hm/slhal
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

change uart in/out port

Browse Source
This commit is contained in:
吕全辉
2020-10-07 08:55:36 +08:00
parent 238614d729
commit eebb4812dd
2 changed files with 13 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files
EF3Lite/hal_uart_in_wrapper.c
+2 -2
View File
@@ -71,13 +71,13 @@ ErrorCode[0] = -1;
{
case 0:
// TODO read all data from fifo
Data_len[0] = UART_RX_FIFO_read(&rs232_rx1, Data, y_width);
Data_len[0] = UART_RX_FIFO_read(&uart6_RS232_GCS_rx, Data, y_width);
ErrorCode[0] = 0;
break;
case 1:
// TODO read all data from fifo
Data_len[0] = UART_RX_FIFO_read(&rs422_rx2, Data, y_width);
Data_len[0] = UART_RX_FIFO_read(&uart5_RS232_HIL_rx, Data, y_width);
ErrorCode[0] = 0;
break;
EF3Lite/hal_uart_out_wrapper.c
+11 -4
View File
@@ -69,17 +69,24 @@ void hal_uart_out_Outputs_wrapper(uint8_T *buff,
* u_width - the maximum size of buff, do not read buff out of range.
*************************************************/
ErrorCode[0] = -1;
static uint8_T seq_last[16];
switch (uart_id[0])
{
case 0:
// TODO write all data to fifo
UART_TX_FIFO_write(&rs232_tx1, buff, len[0]);
ErrorCode[0] = 0;
if (sep[0] != seq_last[uart_id[0]] && UART_TX_FIFO_write(&uart6_RS232_GCS_tx, (uint8_t *)buff, len[0]))
{
seq_last[uart_id[0]] = sep[0];
ErrorCode[0] = 0;
}
break;
case 1:
// TODO write all data to fifo
UART_TX_FIFO_write(&rs422_tx2, buff, len[0]);
ErrorCode[0] = 0;
if (sep[0] != seq_last[uart_id[0]] && UART_TX_FIFO_write(&uart5_RS232_HIL_tx, (uint8_t *)buff, len[0]))
{
seq_last[uart_id[0]] = sep[0];
ErrorCode[0] = 0;
}
break;
}
#else