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update gencode based on 6377027

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This commit is contained in:
Matthew GONG
2021-04-25 09:40:58 +08:00
parent 4456ef5e32
commit ab384fac8a
10 changed files with 70 additions and 52 deletions
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SIL/work/SIL_ert_shrlib_rtw/SIL.c
+52 -35
View File
@@ -5,7 +5,7 @@
*
* Model version : 1.628
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 24 19:55:36 2021
* C/C++ source code generated on : Sun Apr 25 09:27:39 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -197,11 +197,11 @@
#define SIL_IN_good ((uint8_T)2U)
/* Named constants for Chart: '<S7>/rec_ctrl' */
#define SIL_IN_delay_l ((uint8_T)1U)
#define SIL_IN_idle_a ((uint8_T)2U)
#define SIL_IN_delay_e ((uint8_T)1U)
#define SIL_IN_idle_k ((uint8_T)2U)
#define SIL_IN_start ((uint8_T)2U)
#define SIL_IN_wait1 ((uint8_T)3U)
#define SIL_IN_work_e ((uint8_T)4U)
#define SIL_IN_work_m ((uint8_T)4U)
/* user code (top of source file) */
void get_sbg_crc16(const unsigned char *u0,
@@ -16273,8 +16273,8 @@ void SIL_step(void)
/* End of Chart: '<S1313>/Chart' */
/* Chart: '<S1324>/Chart' */
if (SIL_DW.temporalCounter_i1_b < 255U) {
SIL_DW.temporalCounter_i1_b++;
if (SIL_DW.temporalCounter_i1_bi < 255U) {
SIL_DW.temporalCounter_i1_bi++;
}
if (SIL_DW.is_active_c69_kb3_autopilot == 0U) {
@@ -16284,16 +16284,16 @@ void SIL_step(void)
} else if (SIL_DW.is_c69_kb3_autopilot == SIL_IN_bad) {
if (SIL_DW.last_seq_b1 != SIL_B.UnitDelay_is) {
SIL_DW.is_c69_kb3_autopilot = SIL_IN_good;
SIL_DW.temporalCounter_i1_b = 0U;
SIL_DW.temporalCounter_i1_bi = 0U;
idx |= 2U;
SIL_DW.last_seq_b1 = SIL_B.UnitDelay_is;
}
} else if (SIL_DW.last_seq_b1 != SIL_B.UnitDelay_is) {
SIL_DW.is_c69_kb3_autopilot = SIL_IN_good;
SIL_DW.temporalCounter_i1_b = 0U;
SIL_DW.temporalCounter_i1_bi = 0U;
idx |= 2U;
SIL_DW.last_seq_b1 = SIL_B.UnitDelay_is;
} else if (SIL_DW.temporalCounter_i1_b >= 200U) {
} else if (SIL_DW.temporalCounter_i1_bi >= 200U) {
SIL_DW.is_c69_kb3_autopilot = SIL_IN_bad;
SIL_DW.last_seq_b1 = SIL_B.UnitDelay_is;
} else {
@@ -29416,12 +29416,12 @@ void SIL_step(void)
/* End of Outputs for SubSystem: '<Root>/kb3_autopilot' */
/* Chart: '<S7>/rec_ctrl' */
if (SIL_DW.temporalCounter_i1_cx < 255U) {
SIL_DW.temporalCounter_i1_cx++;
if (SIL_DW.temporalCounter_i1_b < 255U) {
SIL_DW.temporalCounter_i1_b++;
}
if (SIL_DW.temporalCounter_i2_n < 15U) {
SIL_DW.temporalCounter_i2_n++;
if (SIL_DW.temporalCounter_i2_e < 15U) {
SIL_DW.temporalCounter_i2_e++;
}
if (SIL_DW.temporalCounter_i3 < 63U) {
@@ -29448,15 +29448,15 @@ void SIL_step(void)
/* End of Outputs for SubSystem: '<S7>/new_rec' */
SIL_DW.is_c3_kb3_rec = SIL_IN_wait;
SIL_DW.temporalCounter_i1_cx = 0U;
SIL_DW.temporalCounter_i1_b = 0U;
break;
case SIL_IN_wait:
if (SIL_DW.temporalCounter_i1_cx >= 200U) {
SIL_DW.is_c3_kb3_rec = SIL_IN_work_e;
SIL_DW.temporalCounter_i2_n = 0U;
SIL_DW.is_a20Hz1 = SIL_IN_delay_l;
SIL_DW.temporalCounter_i1_cx = 0U;
if (SIL_DW.temporalCounter_i1_b >= 200U) {
SIL_DW.is_c3_kb3_rec = SIL_IN_work_m;
SIL_DW.temporalCounter_i2_e = 0U;
SIL_DW.is_a20Hz1 = SIL_IN_delay_e;
SIL_DW.temporalCounter_i1_b = 0U;
SIL_DW.is_a5Hz = SIL_IN_start;
SIL_DW.temporalCounter_i3 = 0U;
SIL_DW.is_a5Hz1 = SIL_IN_start;
@@ -29465,7 +29465,7 @@ void SIL_step(void)
break;
case SIL_IN_wait1:
if (SIL_DW.temporalCounter_i1_cx >= 200U) {
if (SIL_DW.temporalCounter_i1_b >= 200U) {
/* Outport: '<Root>/rec_seq' */
SIL_Y.rec_seq++;
@@ -29480,7 +29480,7 @@ void SIL_step(void)
break;
default:
if (SIL_DW.temporalCounter_i2_n >= 10U) {
if (SIL_DW.temporalCounter_i2_e >= 10U) {
/* Outport: '<Root>/rec_seq' */
SIL_Y.rec_seq++;
@@ -29629,16 +29629,16 @@ void SIL_step(void)
SIL_B.Merge1_e = SIL_ConstB.Width1_i;
/* End of Outputs for SubSystem: '<S7>/rec20Hz' */
SIL_DW.temporalCounter_i2_n = 0U;
SIL_DW.temporalCounter_i2_e = 0U;
}
if (SIL_DW.is_a20Hz1 == SIL_IN_delay_l) {
if (SIL_DW.temporalCounter_i1_cx >= 2U) {
SIL_DW.is_a20Hz1 = SIL_IN_idle_a;
SIL_DW.temporalCounter_i1_cx = 0U;
if (SIL_DW.is_a20Hz1 == SIL_IN_delay_e) {
if (SIL_DW.temporalCounter_i1_b >= 2U) {
SIL_DW.is_a20Hz1 = SIL_IN_idle_k;
SIL_DW.temporalCounter_i1_b = 0U;
}
} else {
if (SIL_DW.temporalCounter_i1_cx >= 10U) {
if (SIL_DW.temporalCounter_i1_b >= 10U) {
/* Outport: '<Root>/rec_seq' */
SIL_Y.rec_seq++;
@@ -29749,8 +29749,8 @@ void SIL_step(void)
SIL_B.Merge1_e = SIL_ConstB.Width1_l;
/* End of Outputs for SubSystem: '<S7>/rec20Hz1' */
SIL_DW.is_a20Hz1 = SIL_IN_idle_a;
SIL_DW.temporalCounter_i1_cx = 0U;
SIL_DW.is_a20Hz1 = SIL_IN_idle_k;
SIL_DW.temporalCounter_i1_b = 0U;
}
}
@@ -29908,6 +29908,18 @@ void SIL_step(void)
SIL_B.TmpSignalConversionAtBytePackInport2_o[10] =
SIL_B.imu_temp_j;
/* SignalConversion: '<S1382>/TmpSignal ConversionAtByte PackInport3' */
SIL_B.TmpSignalConversionAtBytePackInport3_p[0] =
SIL_B.UnitDelay_is;
SIL_B.TmpSignalConversionAtBytePackInport3_p[1] =
SIL_B.UnitDelay_is;
SIL_B.TmpSignalConversionAtBytePackInport3_p[2] = SIL_B.good_d;
SIL_B.TmpSignalConversionAtBytePackInport3_p[3] = SIL_B.good_l;
SIL_B.TmpSignalConversionAtBytePackInport3_p[4] = SIL_B.good_g;
SIL_B.TmpSignalConversionAtBytePackInport3_p[5] = SIL_B.good_m;
SIL_B.TmpSignalConversionAtBytePackInport3_p[6] = SIL_B.good;
SIL_B.TmpSignalConversionAtBytePackInport3_p[7] = SIL_B.good_f;
/* S-Function (any2byte): '<S1382>/Byte Pack' */
/* Pack: <S1382>/Byte Pack */
@@ -29916,10 +29928,15 @@ void SIL_step(void)
(void) memcpy(&SIL_B.BytePack[4],
&SIL_B.TmpSignalConversionAtBytePackInport2_o[0],
44);
(void) memcpy(&SIL_B.BytePack[48],
&SIL_B.TmpSignalConversionAtBytePackInport3_p[0],
16);
(void) memcpy(&SIL_B.BytePack[64], &SIL_B.UnitDelay_f[0],
5);
/* Sum: '<S1382>/Sum of Elements' */
rtb_Rem = 0U;
for (idx = 0; idx < 48; idx++) {
for (idx = 0; idx < 69; idx++) {
rtb_Rem = (uint8_T)((uint32_T)rtb_Rem + SIL_B.BytePack[idx]);
/* SignalConversion: '<S1377>/OutportBufferFordata' */
@@ -29936,8 +29953,8 @@ void SIL_step(void)
SIL_B.Merge_gk[1] = 144U;
SIL_B.Merge_gk[2] = 4U;
SIL_B.Merge_gk[3] = SIL_ConstB.Width;
SIL_B.Merge_gk[52] = rtb_Rem;
memset(&SIL_B.Merge_gk[53], 0, 207U * sizeof(uint8_T));
SIL_B.Merge_gk[73] = rtb_Rem;
memset(&SIL_B.Merge_gk[74], 0, 186U * sizeof(uint8_T));
/* SignalConversion: '<S1377>/OutportBufferForlen' */
SIL_B.Merge1_e = SIL_ConstB.Width1;
@@ -32366,7 +32383,7 @@ void SIL_initialize(void)
SIL_DW.is_c58_kb3_autopilot = SIL_IN_NO_ACTIVE_CHILD_l3;
/* SystemInitialize for Chart: '<S1324>/Chart' */
SIL_DW.temporalCounter_i1_b = 0U;
SIL_DW.temporalCounter_i1_bi = 0U;
SIL_DW.is_active_c69_kb3_autopilot = 0U;
SIL_DW.is_c69_kb3_autopilot = SIL_IN_NO_ACTIVE_CHILD_l3;
@@ -32817,9 +32834,9 @@ void SIL_initialize(void)
/* End of SystemInitialize for SubSystem: '<Root>/kb3_autopilot' */
/* SystemInitialize for Chart: '<S7>/rec_ctrl' */
SIL_DW.temporalCounter_i2_n = 0U;
SIL_DW.temporalCounter_i2_e = 0U;
SIL_DW.is_a20Hz1 = SIL_IN_NO_ACTIVE_CHILD_l3;
SIL_DW.temporalCounter_i1_cx = 0U;
SIL_DW.temporalCounter_i1_b = 0U;
SIL_DW.is_a5Hz = SIL_IN_NO_ACTIVE_CHILD_l3;
SIL_DW.temporalCounter_i3 = 0U;
SIL_DW.is_a5Hz1 = SIL_IN_NO_ACTIVE_CHILD_l3;
SIL/work/SIL_ert_shrlib_rtw/SIL.h
+6 -5
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@@ -5,7 +5,7 @@
*
* Model version : 1.628
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 24 19:55:36 2021
* C/C++ source code generated on : Sun Apr 25 09:27:39 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -984,6 +984,7 @@ typedef struct {
ENUM_AFCS_LAT AFCS_LNAV_n; /* '<S759>/landing_task' */
uint16_T UnitDelay_is; /* '<S453>/Unit Delay' */
uint16_T Merge1_e; /* '<S7>/Merge1' */
uint16_T TmpSignalConversionAtBytePackInport3_p[8];
uint16_T TmpSignalConversionAtBytePackInport4_b[18];
uint16_T TmpSignalConversionAtBytePackInport5[10];
uint16_T Subtract_m; /* '<S1070>/Subtract' */
@@ -1098,7 +1099,7 @@ typedef struct {
uint8_T BitwiseAND6; /* '<S5>/Bitwise AND6' */
uint8_T UnitDelay_f[5]; /* '<S2>/Unit Delay' */
uint8_T Merge_gk[260]; /* '<S7>/Merge' */
uint8_T BytePack[48]; /* '<S1382>/Byte Pack' */
uint8_T BytePack[69]; /* '<S1382>/Byte Pack' */
uint8_T TmpSignalConversionAtBytePackInport5_h[16];
uint8_T BytePack_g[76]; /* '<S1381>/Byte Pack' */
uint8_T BytePack_i[156]; /* '<S1380>/Byte Pack' */
@@ -1730,8 +1731,8 @@ typedef struct {
uint8_T is_a20Hz1; /* '<S7>/rec_ctrl' */
uint8_T is_a5Hz; /* '<S7>/rec_ctrl' */
uint8_T is_a5Hz1; /* '<S7>/rec_ctrl' */
uint8_T temporalCounter_i1_cx; /* '<S7>/rec_ctrl' */
uint8_T temporalCounter_i2_n; /* '<S7>/rec_ctrl' */
uint8_T temporalCounter_i1_b; /* '<S7>/rec_ctrl' */
uint8_T temporalCounter_i2_e; /* '<S7>/rec_ctrl' */
uint8_T temporalCounter_i3; /* '<S7>/rec_ctrl' */
uint8_T temporalCounter_i4; /* '<S7>/rec_ctrl' */
uint8_T is_active_c90_kb3_autopilot; /* '<S1339>/Chart' */
@@ -1763,7 +1764,7 @@ typedef struct {
uint8_T temporalCounter_i1_j; /* '<S1329>/Chart' */
uint8_T is_active_c69_kb3_autopilot; /* '<S1324>/Chart' */
uint8_T is_c69_kb3_autopilot; /* '<S1324>/Chart' */
uint8_T temporalCounter_i1_b; /* '<S1324>/Chart' */
uint8_T temporalCounter_i1_bi; /* '<S1324>/Chart' */
uint8_T is_active_c68_kb3_autopilot; /* '<S1322>/Chart' */
uint8_T is_c68_kb3_autopilot; /* '<S1322>/Chart' */
uint8_T last_seq_c; /* '<S1322>/Chart' */
SIL/work/SIL_ert_shrlib_rtw/SIL_capi.c
+5 -5
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@@ -5,7 +5,7 @@
*
* Model version : 1.628
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 24 19:55:36 2021
* C/C++ source code generated on : Sun Apr 25 09:27:39 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -664,10 +664,10 @@ static rtwCAPI_ModelMappingStaticInfo mmiStatic = {
rtElementMap, rtSampleTimeMap, rtDimensionArray },
"float",
{ 1611960380U,
3625593346U,
2670386422U,
2264851553U },
{ 631906187U,
2418969835U,
2347187960U,
2397949061U },
(NULL), 0,
0
};
SIL/work/SIL_ert_shrlib_rtw/SIL_capi.h
+1 -1
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@@ -5,7 +5,7 @@
*
* Model version : 1.628
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 24 19:55:36 2021
* C/C++ source code generated on : Sun Apr 25 09:27:39 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
SIL/work/SIL_ert_shrlib_rtw/SIL_data.c
+3 -3
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@@ -5,7 +5,7 @@
*
* Model version : 1.628
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 24 19:55:36 2021
* C/C++ source code generated on : Sun Apr 25 09:27:39 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -47,11 +47,11 @@ const ConstB_SIL_T SIL_ConstB = {
{ -0.5, -0.5, 0.6 }, /* '<S404>/Selector2' */
1.0, /* '<S30>/Selector4' */
53U, /* '<S1382>/Width1' */
74U, /* '<S1382>/Width1' */
81U, /* '<S1381>/Width1' */
161U, /* '<S1380>/Width1' */
215U, /* '<S1379>/Width1' */
48U, /* '<S1382>/Width' */
69U, /* '<S1382>/Width' */
76U, /* '<S1381>/Width' */
156U, /* '<S1380>/Width' */
210U, /* '<S1379>/Width' */
SIL/work/SIL_ert_shrlib_rtw/SIL_private.h
+1 -1
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@@ -5,7 +5,7 @@
*
* Model version : 1.628
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 24 19:55:36 2021
* C/C++ source code generated on : Sun Apr 25 09:27:39 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
SIL/work/SIL_ert_shrlib_rtw/SIL_types.h
+1 -1
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@@ -5,7 +5,7 @@
*
* Model version : 1.628
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 24 19:55:36 2021
* C/C++ source code generated on : Sun Apr 25 09:27:39 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
SIL/work/SIL_ert_shrlib_rtw/buildInfo.mat
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SIL/work/SIL_ert_shrlib_rtw/rtmodel.h
+1 -1
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@@ -5,7 +5,7 @@
*
* Model version : 1.628
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 24 19:55:36 2021
* C/C++ source code generated on : Sun Apr 25 09:27:39 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
SIL/work/SIL_win64.dll
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