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update gencode

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This commit is contained in:
matt on matebook
2022-04-09 23:44:00 +08:00
parent db2aa1a00d
commit 97aa28d494
10 changed files with 15 additions and 13 deletions
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SIL/work/SIL_ert_shrlib_rtw/SIL.c
+3 -1
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@@ -5,7 +5,7 @@
*
* Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 9 22:40:21 2022
* C/C++ source code generated on : Sat Apr 9 23:39:49 2022
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -31442,6 +31442,8 @@ void SIL_step(void)
SIL_DW.send_item_msgData.x = SIL_B.x_k;
SIL_DW.send_item_msgData.y = SIL_B.y_m;
SIL_DW.send_item_msgData.z = SIL_B.z_n;
SIL_DW.send_item_msgData.mission_type =
SIL_B.mav_mission_request.mission_type;
SIL_sf_msg_send_send_item();
} else {
SIL_DW.send_ack_msgData_b.type = SIL_B.ack_iw;
SIL/work/SIL_ert_shrlib_rtw/SIL.h
+1 -1
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@@ -5,7 +5,7 @@
*
* Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 9 22:40:21 2022
* C/C++ source code generated on : Sat Apr 9 23:39:49 2022
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
SIL/work/SIL_ert_shrlib_rtw/SIL_capi.c
+5 -5
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@@ -5,7 +5,7 @@
*
* Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 9 22:40:21 2022
* C/C++ source code generated on : Sat Apr 9 23:39:49 2022
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -710,10 +710,10 @@ static rtwCAPI_ModelMappingStaticInfo mmiStatic = {
rtElementMap, rtSampleTimeMap, rtDimensionArray },
"float",
{ 3420073537U,
1465178364U,
2075474170U,
2071757419U },
{ 924513430U,
1309561543U,
1066736039U,
2528993947U },
(NULL), 0,
0
};
SIL/work/SIL_ert_shrlib_rtw/SIL_capi.h
+1 -1
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@@ -5,7 +5,7 @@
*
* Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 9 22:40:21 2022
* C/C++ source code generated on : Sat Apr 9 23:39:49 2022
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
SIL/work/SIL_ert_shrlib_rtw/SIL_data.c
+1 -1
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@@ -5,7 +5,7 @@
*
* Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 9 22:40:21 2022
* C/C++ source code generated on : Sat Apr 9 23:39:49 2022
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
SIL/work/SIL_ert_shrlib_rtw/SIL_private.h
+2 -2
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@@ -5,7 +5,7 @@
*
* Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 9 22:40:21 2022
* C/C++ source code generated on : Sat Apr 9 23:39:49 2022
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -16,10 +16,10 @@
#ifndef RTW_HEADER_SIL_private_h_
#define RTW_HEADER_SIL_private_h_
void save_mission(char);
void get_sbg_crc16(const unsigned char *u0,
unsigned short *y0,
unsigned short u_width);
void save_mission(char);
#include "rtwtypes.h"
#include "builtin_typeid_types.h"
SIL/work/SIL_ert_shrlib_rtw/SIL_types.h
+1 -1
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@@ -5,7 +5,7 @@
*
* Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 9 22:40:21 2022
* C/C++ source code generated on : Sat Apr 9 23:39:49 2022
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
SIL/work/SIL_ert_shrlib_rtw/buildInfo.mat
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SIL/work/SIL_ert_shrlib_rtw/rtmodel.h
+1 -1
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@@ -5,7 +5,7 @@
*
* Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Apr 9 22:40:21 2022
* C/C++ source code generated on : Sat Apr 9 23:39:49 2022
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
SIL/work/SIL_win64.dll
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