hm
b49c9ab0c6
完整实现了以下模块： - 系统数据总线(sys_data_bus)模块间通信 - UART/USART/LPUART驱动 + RS485半双工 - I2C驱动(AS5600角度传感器 + AT24C02 EEPROM) - Modbus RTU从站协议 - 步进电机微步进控制(正弦/余弦换相+S曲线加减速) - 到位开关驱动(DI_MIN/DI_MAX) - PGA+ADC电流检测 - 系统监控任务(内存/串口/传感器/任务状态) - LED/Key外设驱动 - 基于CMake + arm-none-eabi-gcc构建系统
241 lines
7.7 KiB
C
241 lines
7.7 KiB
C
#ifndef __CORE_CM0PLUS_H__
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#define __CORE_CM0PLUS_H__
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#include <stdint.h>
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#include "cmsis_version.h"
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#include "cmsis_compiler.h"
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#include "cmsis_gcc.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define __CM0PLUS_REV 0x0000U
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#define __MPU_PRESENT 0U
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#define __VTOR_PRESENT 1U
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#define __NVIC_PRIO_BITS 2U
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#define __Vendor_SysTickConfig 0U
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typedef struct {
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__IOM uint32_t ISER[1U];
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uint32_t RESERVED0[31U];
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__IOM uint32_t ICER[1U];
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uint32_t RESERVED1[31U];
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__IOM uint32_t ISPR[1U];
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uint32_t RESERVED2[31U];
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__IOM uint32_t ICPR[1U];
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uint32_t RESERVED3[31U];
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uint32_t RESERVED4[64U];
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__IOM uint32_t IPR[8U];
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} NVIC_Type;
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typedef struct {
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__IM uint32_t CPUID;
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__IOM uint32_t ICSR;
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uint32_t RESERVED0;
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__IOM uint32_t AIRCR;
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__IOM uint32_t SCR;
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__IOM uint32_t CCR;
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uint32_t RESERVED1;
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__IOM uint32_t SHP[2U];
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__IOM uint32_t SHCSR;
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} SCB_Type;
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typedef struct {
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__IOM uint32_t CTRL;
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__IOM uint32_t LOAD;
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__IOM uint32_t VAL;
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__IM uint32_t CALIB;
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} SysTick_Type;
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#define SCB_ACTLR_SPLISCIE_Pos 0U
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#define SCB_ACTLR_SPLISCIE_Msk (1UL << SCB_ACTLR_SPLISCIE_Pos)
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#define SCB_ACTLR_DISOOFP_Pos 1U
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#define SCB_ACTLR_DISOOFP_Msk (1UL << SCB_ACTLR_DISOOFP_Pos)
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#define SCB_ACTLR_DISFPCA_Pos 2U
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#define SCB_ACTLR_DISFPCA_Msk (1UL << SCB_ACTLR_DISFPCA_Pos)
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#define SCB_CPUID_REVISION_Pos 20U
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#define SCB_CPUID_REVISION_Msk (0xFU << SCB_CPUID_REVISION_Pos)
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#define SCB_CPUID_PARTNO_Pos 4U
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#define SCB_CPUID_PARTNO_Msk (0xFFFU << SCB_CPUID_PARTNO_Pos)
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#define SCB_CPUID_CONSTANT_Pos 0U
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#define SCB_CPUID_CONSTANT_Msk (0xFU << SCB_CPUID_CONSTANT_Pos)
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#define SCB_ICSR_NMIPENDSET_Pos 31U
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#define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos)
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#define SCB_ICSR_PENDSVSET_Pos 28U
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#define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos)
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#define SCB_ICSR_PENDSVCLR_Pos 27U
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#define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos)
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#define SCB_ICSR_PENDSTSET_Pos 26U
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#define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos)
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#define SCB_ICSR_PENDSTCLR_Pos 25U
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#define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos)
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#define SCB_ICSR_ISRPREEMPT_Pos 23U
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#define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos)
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#define SCB_ICSR_ISRPENDING_Pos 22U
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#define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos)
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#define SCB_ICSR_VECTPENDING_Pos 12U
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#define SCB_ICSR_VECTPENDING_Msk (0x3FFUL << SCB_ICSR_VECTPENDING_Pos)
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#define SCB_ICSR_VECTACTIVE_Pos 0U
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#define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL << SCB_ICSR_VECTACTIVE_Pos)
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#define SCB_AIRCR_VECTKEY_Pos 16U
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#define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)
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#define SCB_AIRCR_SYSRESETREQ_Pos 2U
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#define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos)
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#define SCB_AIRCR_VECTCLRACTIVE_Pos 1U
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#define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)
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#define SCB_AIRCR_ENDIANESS_Pos 0U
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#define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos)
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#define SCB_SCR_SEVONPEND_Pos 4U
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#define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos)
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#define SCB_SCR_SLEEPDEEP_Pos 2U
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#define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos)
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#define SCB_SCR_SLEEPONEXIT_Pos 1U
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#define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos)
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#define SCB_CCR_STKALIGN_Pos 9U
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#define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos)
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#define SCB_CCR_UNALIGN_TRP_Pos 3U
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#define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos)
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#define SCB_SHCSR_SVCALLPENDED_Pos 15U
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#define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos)
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#define SysTick_CTRL_COUNTFLAG_Pos 16U
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#define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos)
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#define SysTick_CTRL_CLKSOURCE_Pos 2U
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#define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos)
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#define SysTick_CTRL_TICKINT_Pos 1U
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#define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos)
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#define SysTick_CTRL_ENABLE_Pos 0U
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#define SysTick_CTRL_ENABLE_Msk (1UL << SysTick_CTRL_ENABLE_Pos)
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#define SysTick_LOAD_RELOAD_Pos 0U
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#define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL << SysTick_LOAD_RELOAD_Pos)
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#define SysTick_VAL_CURRENT_Pos 0U
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#define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL << SysTick_VAL_CURRENT_Pos)
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#define SysTick_CALIB_TENMS_Pos 0U
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#define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL << SysTick_CALIB_TENMS_Pos)
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#define SysTick_CALIB_SKEW_Pos 30U
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#define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos)
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#define SysTick_CALIB_NOREF_Pos 31U
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#define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos)
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#define SHP_START_ADDR 0xE000ED18U
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#define VTOR_ADDR 0xE000ED08U
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#define NVIC_BASE 0xE000E100U
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#define SCB_BASE 0xE000ED00U
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#define SysTick_BASE 0xE000E010U
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#define NVIC ((NVIC_Type *)NVIC_BASE)
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#define SCB ((SCB_Type *)SCB_BASE)
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#define SysTick ((SysTick_Type *)SysTick_BASE)
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#define NonMaskableInt_IRQn (-14)
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#define HardFault_IRQn (-13)
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#define SVCall_IRQn (-5)
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#define PendSV_IRQn (-2)
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#define SysTick_IRQn (-1)
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typedef int32_t IRQn_Type;
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__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
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{
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if ((int32_t)(IRQn) >= 0)
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{
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NVIC->IPR[(uint32_t)IRQn] = (uint32_t)(priority << (8U - __NVIC_PRIO_BITS));
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}
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else
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{
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SCB->SHP[(uint32_t)((int32_t)(IRQn) & 0xFUL) - 4UL] = (uint32_t)(priority << (8U - __NVIC_PRIO_BITS));
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}
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}
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__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
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{
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if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
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{
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return 1UL;
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}
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SysTick->LOAD = (uint32_t)(ticks - 1UL);
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NVIC_SetPriority(SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL);
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SysTick->VAL = 0UL;
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SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
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SysTick_CTRL_TICKINT_Msk |
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SysTick_CTRL_ENABLE_Msk;
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return 0UL;
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}
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__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
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{
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if ((int32_t)(IRQn) >= 0)
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{
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return ((uint32_t)(NVIC->IPR[(uint32_t)IRQn] >> (8U - __NVIC_PRIO_BITS)));
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}
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else
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{
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return ((uint32_t)(SCB->SHP[(uint32_t)((int32_t)(IRQn) & 0xFUL) - 4UL] >> (8U - __NVIC_PRIO_BITS)));
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}
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}
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__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
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{
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NVIC->ISER[0U] = (uint32_t)(1UL << ((uint32_t)(int32_t)IRQn) & 0x1FUL);
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}
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__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
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{
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NVIC->ICER[0U] = (uint32_t)(1UL << ((uint32_t)(int32_t)IRQn) & 0x1FUL);
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}
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__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
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{
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return ((uint32_t)((NVIC->ISPR[0U] >> ((uint32_t)(int32_t)IRQn)) & 1UL));
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}
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__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
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{
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NVIC->ISPR[0U] = (uint32_t)(1UL << ((uint32_t)(int32_t)IRQn) & 0x1FUL);
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}
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__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
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{
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NVIC->ICPR[0U] = (uint32_t)(1UL << ((uint32_t)(int32_t)IRQn) & 0x1FUL);
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}
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__STATIC_INLINE void NVIC_SystemReset(void)
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{
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__DSB();
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SCB->AIRCR = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
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(SCB->AIRCR & SCB_AIRCR_ENDIANESS_Msk) |
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SCB_AIRCR_SYSRESETREQ_Msk);
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__DSB();
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for (;;) { __NOP(); }
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}
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__STATIC_INLINE uint32_t SCB_GetVTOR(void)
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{
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return (*(volatile uint32_t *)VTOR_ADDR);
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}
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__STATIC_INLINE void SCB_SetVTOR(uint32_t offset)
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{
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*(volatile uint32_t *)VTOR_ADDR = offset;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif
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