update gencode based on 0c09ddc

This commit is contained in:
Matthew GONG
2021-08-01 14:11:40 +08:00
parent 7b40684838
commit c8c8a7f8a5
9 changed files with 875 additions and 839 deletions
File diff suppressed because it is too large Load Diff
@@ -5,7 +5,7 @@
*
* Model version : 1.1206
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Jul 31 16:19:43 2021
* C/C++ source code generated on : Sun Aug 1 11:52:22 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -590,7 +590,7 @@ typedef struct {
uint32_T SFunction_n; /* '<S764>/S-Function' */
uint32_T OutportBuffer_InsertedFor_gps_vel_status_at_inport_0;/* '<S1292>/Constant' */
uint32_T OutportBuffer_InsertedFor_gps_pos_status_at_inport_0;/* '<S1288>/Constant' */
real32_T TmpSignalConversionAtBytePackInport3_g[20];
real32_T TmpSignalConversionAtBytePackInport3_g[21];
real32_T TmpSignalConversionAtBytePackInport4[12];
real32_T TmpSignalConversionAtBytePackInport2[11];
real32_T TmpSignalConversionAtBytePackInport4_e[4];
@@ -1093,7 +1093,7 @@ typedef struct {
int16_T temp; /* '<S1225>/Byte Unpack' */
int16_T param_idx; /* '<S753>/set_val_capi' */
int16_T param_idx_a; /* '<S743>/find_idx_capi' */
uint8_T seq_f; /* '<S7>/record_traffic_ctrl' */
uint8_T seq_m; /* '<S7>/record_traffic_ctrl' */
uint8_T BytePack[55]; /* '<S1325>/Byte Pack' */
uint8_T TmpSignalConversionAtSFunctionInport1[60];
uint8_T BytePack_n[25]; /* '<S1326>/Byte Pack' */
@@ -1106,8 +1106,8 @@ typedef struct {
uint8_T TmpSignalConversionAtSFunctionInport1_i[65];
uint8_T hal_rec_o1[256]; /* '<S1385>/hal_rec' */
uint8_T TmpSignalConversionAtSFunctionInport1_l[260];
uint8_T BytePack_a[94]; /* '<S1335>/Byte Pack' */
uint8_T TmpSignalConversionAtSFunctionInport1_n[99];
uint8_T BytePack_a[98]; /* '<S1335>/Byte Pack' */
uint8_T TmpSignalConversionAtSFunctionInport1_n[103];
uint8_T TmpSignalConversionAtBytePackInport6_c[2];
uint8_T TmpSignalConversionAtBytePackInport8[17];
uint8_T BytePack_j[99]; /* '<S1334>/Byte Pack' */
@@ -2225,19 +2225,6 @@ typedef struct {
const real_T Sum1_lq; /* '<S1117>/Sum1' */
const real_T Sum1_o; /* '<S1115>/Sum1' */
const real_T Product2_g; /* '<S1115>/Product2' */
const real_T TmpSignalConversionAtsincosInport1[3];
const real_T sincos_o1[3]; /* '<S956>/sincos' */
const real_T sincos_o2[3]; /* '<S956>/sincos' */
const real_T Fcn11; /* '<S956>/Fcn11' */
const real_T Fcn21; /* '<S956>/Fcn21' */
const real_T Fcn31; /* '<S956>/Fcn31' */
const real_T Fcn12; /* '<S956>/Fcn12' */
const real_T Fcn22; /* '<S956>/Fcn22' */
const real_T Fcn32; /* '<S956>/Fcn32' */
const real_T Fcn13; /* '<S956>/Fcn13' */
const real_T Fcn23; /* '<S956>/Fcn23' */
const real_T Fcn33; /* '<S956>/Fcn33' */
const real_T VectorConcatenate[9]; /* '<S1047>/Vector Concatenate' */
const real_T Sum_k; /* '<S1125>/Sum' */
const real_T Product3; /* '<S1125>/Product3' */
const real_T Sum2; /* '<S1125>/Sum2' */
@@ -2260,19 +2247,19 @@ typedef struct {
const real_T Selector1[3]; /* '<S1127>/Selector1' */
const real_T Selector[3]; /* '<S1127>/Selector' */
const real_T Selector2[3]; /* '<S1127>/Selector2' */
const real_T TmpSignalConversionAtsincosInport1_k[3];
const real_T sincos_o1_m[3]; /* '<S889>/sincos' */
const real_T sincos_o2_a[3]; /* '<S889>/sincos' */
const real_T Fcn11_h; /* '<S889>/Fcn11' */
const real_T Fcn21_c; /* '<S889>/Fcn21' */
const real_T Fcn31_l; /* '<S889>/Fcn31' */
const real_T Fcn12_k; /* '<S889>/Fcn12' */
const real_T Fcn22_n; /* '<S889>/Fcn22' */
const real_T Fcn32_n; /* '<S889>/Fcn32' */
const real_T Fcn13_p; /* '<S889>/Fcn13' */
const real_T Fcn23_o; /* '<S889>/Fcn23' */
const real_T Fcn33_d; /* '<S889>/Fcn33' */
const real_T VectorConcatenate_c[9]; /* '<S890>/Vector Concatenate' */
const real_T TmpSignalConversionAtsincosInport1[3];
const real_T sincos_o1[3]; /* '<S889>/sincos' */
const real_T sincos_o2[3]; /* '<S889>/sincos' */
const real_T Fcn11; /* '<S889>/Fcn11' */
const real_T Fcn21; /* '<S889>/Fcn21' */
const real_T Fcn31; /* '<S889>/Fcn31' */
const real_T Fcn12; /* '<S889>/Fcn12' */
const real_T Fcn22; /* '<S889>/Fcn22' */
const real_T Fcn32; /* '<S889>/Fcn32' */
const real_T Fcn13; /* '<S889>/Fcn13' */
const real_T Fcn23; /* '<S889>/Fcn23' */
const real_T Fcn33; /* '<S889>/Fcn33' */
const real_T VectorConcatenate[9]; /* '<S890>/Vector Concatenate' */
const real_T MathFunction[9]; /* '<S845>/Math Function' */
const real_T TrigonometricFunction; /* '<S845>/Trigonometric Function' */
const real_T TrigonometricFunction1; /* '<S845>/Trigonometric Function1' */
@@ -3140,6 +3127,9 @@ extern const ConstP_ET39_SIL_T ET39_SIL_ConstP;
* these parameters and exports their symbols.
*
*/
extern real_T Att0[3]; /* Variable: Att0
* Referenced by: '<S940>/Initial Euler Angles'
*/
extern real_T CD0UncertVal; /* Variable: CD0UncertVal
* Referenced by: '<S916>/Param_CD0UncertVal'
*/
@@ -5,7 +5,7 @@
*
* Model version : 1.1206
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Jul 31 16:19:43 2021
* C/C++ source code generated on : Sun Aug 1 11:52:22 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -394,71 +394,73 @@ static const rtwCAPI_ModelParameters rtModelParameters[] = {
{ 170, TARGET_STRING("use_tht_leadlag"), 4, 2, 0 },
{ 171, TARGET_STRING("CD0UncertVal"), 0, 2, 0 },
{ 171, TARGET_STRING("Att0"), 0, 0, 0 },
{ 172, TARGET_STRING("CG_bias_m"), 0, 0, 0 },
{ 172, TARGET_STRING("CD0UncertVal"), 0, 2, 0 },
{ 173, TARGET_STRING("CL0UncertVal"), 0, 2, 0 },
{ 173, TARGET_STRING("CG_bias_m"), 0, 0, 0 },
{ 174, TARGET_STRING("CLaUncertGain"), 0, 2, 0 },
{ 174, TARGET_STRING("CL0UncertVal"), 0, 2, 0 },
{ 175, TARGET_STRING("CLdelUncertGain"), 0, 2, 0 },
{ 175, TARGET_STRING("CLaUncertGain"), 0, 2, 0 },
{ 176, TARGET_STRING("CLderUncertGain"), 0, 2, 0 },
{ 176, TARGET_STRING("CLdelUncertGain"), 0, 2, 0 },
{ 177, TARGET_STRING("CLqUncertGain"), 0, 2, 0 },
{ 177, TARGET_STRING("CLderUncertGain"), 0, 2, 0 },
{ 178, TARGET_STRING("CY0UncertVal"), 0, 2, 0 },
{ 178, TARGET_STRING("CLqUncertGain"), 0, 2, 0 },
{ 179, TARGET_STRING("CYbUncertGain"), 0, 2, 0 },
{ 179, TARGET_STRING("CY0UncertVal"), 0, 2, 0 },
{ 180, TARGET_STRING("CYdelUncertGain"), 0, 2, 0 },
{ 180, TARGET_STRING("CYbUncertGain"), 0, 2, 0 },
{ 181, TARGET_STRING("CYderUncertGain"), 0, 2, 0 },
{ 181, TARGET_STRING("CYdelUncertGain"), 0, 2, 0 },
{ 182, TARGET_STRING("CYpUncertGain"), 0, 2, 0 },
{ 182, TARGET_STRING("CYderUncertGain"), 0, 2, 0 },
{ 183, TARGET_STRING("CYrUncertGain"), 0, 2, 0 },
{ 183, TARGET_STRING("CYpUncertGain"), 0, 2, 0 },
{ 184, TARGET_STRING("Cl0UncertVal"), 0, 2, 0 },
{ 184, TARGET_STRING("CYrUncertGain"), 0, 2, 0 },
{ 185, TARGET_STRING("ClbUncertGain"), 0, 2, 0 },
{ 185, TARGET_STRING("Cl0UncertVal"), 0, 2, 0 },
{ 186, TARGET_STRING("CldalUncertGain"), 0, 2, 0 },
{ 186, TARGET_STRING("ClbUncertGain"), 0, 2, 0 },
{ 187, TARGET_STRING("CldarUncertGain"), 0, 2, 0 },
{ 187, TARGET_STRING("CldalUncertGain"), 0, 2, 0 },
{ 188, TARGET_STRING("ClpUncertGain"), 0, 2, 0 },
{ 188, TARGET_STRING("CldarUncertGain"), 0, 2, 0 },
{ 189, TARGET_STRING("ClrUncertGain"), 0, 2, 0 },
{ 189, TARGET_STRING("ClpUncertGain"), 0, 2, 0 },
{ 190, TARGET_STRING("Cm0UncertVal"), 0, 2, 0 },
{ 190, TARGET_STRING("ClrUncertGain"), 0, 2, 0 },
{ 191, TARGET_STRING("CmaUncertPct"), 0, 2, 0 },
{ 191, TARGET_STRING("Cm0UncertVal"), 0, 2, 0 },
{ 192, TARGET_STRING("CmdelUncertGain"), 0, 2, 0 },
{ 192, TARGET_STRING("CmaUncertPct"), 0, 2, 0 },
{ 193, TARGET_STRING("CmderUncertGain"), 0, 2, 0 },
{ 193, TARGET_STRING("CmdelUncertGain"), 0, 2, 0 },
{ 194, TARGET_STRING("CmqUncertGain"), 0, 2, 0 },
{ 194, TARGET_STRING("CmderUncertGain"), 0, 2, 0 },
{ 195, TARGET_STRING("Cn0UncertVal"), 0, 2, 0 },
{ 195, TARGET_STRING("CmqUncertGain"), 0, 2, 0 },
{ 196, TARGET_STRING("CnbUncertGain"), 0, 2, 0 },
{ 196, TARGET_STRING("Cn0UncertVal"), 0, 2, 0 },
{ 197, TARGET_STRING("CndelUncertGain"), 0, 2, 0 },
{ 197, TARGET_STRING("CnbUncertGain"), 0, 2, 0 },
{ 198, TARGET_STRING("CnderUncertGain"), 0, 2, 0 },
{ 198, TARGET_STRING("CndelUncertGain"), 0, 2, 0 },
{ 199, TARGET_STRING("CnpUncertGain"), 0, 2, 0 },
{ 199, TARGET_STRING("CnderUncertGain"), 0, 2, 0 },
{ 200, TARGET_STRING("CnrUncertGain"), 0, 2, 0 },
{ 200, TARGET_STRING("CnpUncertGain"), 0, 2, 0 },
{ 201, TARGET_STRING("InertiaMoments_bias_kg_m2"), 0, 1, 0 },
{ 201, TARGET_STRING("CnrUncertGain"), 0, 2, 0 },
{ 202, TARGET_STRING("X0"), 0, 0, 0 },
{ 202, TARGET_STRING("InertiaMoments_bias_kg_m2"), 0, 1, 0 },
{ 203, TARGET_STRING("hground"), 0, 2, 0 },
{ 203, TARGET_STRING("X0"), 0, 0, 0 },
{ 204, TARGET_STRING("hground"), 0, 2, 0 },
{ 0, (NULL), 0, 0, 0 }
};
@@ -638,39 +640,40 @@ static void* rtDataAddrMap[] = {
&ET39_SIL_P.use_hv_leadlag, /* 168: Model Parameter */
&ET39_SIL_P.use_phi_leadlag, /* 169: Model Parameter */
&ET39_SIL_P.use_tht_leadlag, /* 170: Model Parameter */
&CD0UncertVal, /* 171: Model Parameter */
CG_bias_m, /* 172: Model Parameter */
&CL0UncertVal, /* 173: Model Parameter */
&CLaUncertGain, /* 174: Model Parameter */
&CLdelUncertGain, /* 175: Model Parameter */
&CLderUncertGain, /* 176: Model Parameter */
&CLqUncertGain, /* 177: Model Parameter */
&CY0UncertVal, /* 178: Model Parameter */
&CYbUncertGain, /* 179: Model Parameter */
&CYdelUncertGain, /* 180: Model Parameter */
&CYderUncertGain, /* 181: Model Parameter */
&CYpUncertGain, /* 182: Model Parameter */
&CYrUncertGain, /* 183: Model Parameter */
&Cl0UncertVal, /* 184: Model Parameter */
&ClbUncertGain, /* 185: Model Parameter */
&CldalUncertGain, /* 186: Model Parameter */
&CldarUncertGain, /* 187: Model Parameter */
&ClpUncertGain, /* 188: Model Parameter */
&ClrUncertGain, /* 189: Model Parameter */
&Cm0UncertVal, /* 190: Model Parameter */
&CmaUncertPct, /* 191: Model Parameter */
&CmdelUncertGain, /* 192: Model Parameter */
&CmderUncertGain, /* 193: Model Parameter */
&CmqUncertGain, /* 194: Model Parameter */
&Cn0UncertVal, /* 195: Model Parameter */
&CnbUncertGain, /* 196: Model Parameter */
&CndelUncertGain, /* 197: Model Parameter */
&CnderUncertGain, /* 198: Model Parameter */
&CnpUncertGain, /* 199: Model Parameter */
&CnrUncertGain, /* 200: Model Parameter */
InertiaMoments_bias_kg_m2, /* 201: Model Parameter */
X0, /* 202: Model Parameter */
&hground, /* 203: Model Parameter */
Att0, /* 171: Model Parameter */
&CD0UncertVal, /* 172: Model Parameter */
CG_bias_m, /* 173: Model Parameter */
&CL0UncertVal, /* 174: Model Parameter */
&CLaUncertGain, /* 175: Model Parameter */
&CLdelUncertGain, /* 176: Model Parameter */
&CLderUncertGain, /* 177: Model Parameter */
&CLqUncertGain, /* 178: Model Parameter */
&CY0UncertVal, /* 179: Model Parameter */
&CYbUncertGain, /* 180: Model Parameter */
&CYdelUncertGain, /* 181: Model Parameter */
&CYderUncertGain, /* 182: Model Parameter */
&CYpUncertGain, /* 183: Model Parameter */
&CYrUncertGain, /* 184: Model Parameter */
&Cl0UncertVal, /* 185: Model Parameter */
&ClbUncertGain, /* 186: Model Parameter */
&CldalUncertGain, /* 187: Model Parameter */
&CldarUncertGain, /* 188: Model Parameter */
&ClpUncertGain, /* 189: Model Parameter */
&ClrUncertGain, /* 190: Model Parameter */
&Cm0UncertVal, /* 191: Model Parameter */
&CmaUncertPct, /* 192: Model Parameter */
&CmdelUncertGain, /* 193: Model Parameter */
&CmderUncertGain, /* 194: Model Parameter */
&CmqUncertGain, /* 195: Model Parameter */
&Cn0UncertVal, /* 196: Model Parameter */
&CnbUncertGain, /* 197: Model Parameter */
&CndelUncertGain, /* 198: Model Parameter */
&CnderUncertGain, /* 199: Model Parameter */
&CnpUncertGain, /* 200: Model Parameter */
&CnrUncertGain, /* 201: Model Parameter */
InertiaMoments_bias_kg_m2, /* 202: Model Parameter */
X0, /* 203: Model Parameter */
&hground, /* 204: Model Parameter */
};
/* Declare Data Run-Time Dimension Buffer Addresses statically */
@@ -787,7 +790,7 @@ static rtwCAPI_ModelMappingStaticInfo mmiStatic = {
(NULL), 0 },
{ rtBlockParameters, 0,
rtModelParameters, 204 },
rtModelParameters, 205 },
{ (NULL), 0 },
@@ -795,10 +798,10 @@ static rtwCAPI_ModelMappingStaticInfo mmiStatic = {
rtElementMap, rtSampleTimeMap, rtDimensionArray },
"float",
{ 3675274250U,
3873472928U,
2308787951U,
3647369256U },
{ 3124855479U,
53724352U,
224880413U,
1463409290U },
(NULL), 0,
0
};
@@ -5,7 +5,7 @@
*
* Model version : 1.1206
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Jul 31 16:19:43 2021
* C/C++ source code generated on : Sun Aug 1 11:52:22 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -5,7 +5,7 @@
*
* Model version : 1.1206
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Jul 31 16:19:43 2021
* C/C++ source code generated on : Sun Aug 1 11:52:22 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -33,23 +33,6 @@ const ConstB_ET39_SIL_T ET39_SIL_ConstB = {
0.00669437999014133, /* '<S1117>/Sum1' */
0.99330562000985867, /* '<S1115>/Sum1' */
0.0067394967422764488, /* '<S1115>/Product2' */
{ 0.0, 0.0, 0.0 }, /* synthesized block */
{ 0.0, 0.0, 0.0 }, /* '<S956>/sincos' */
{ 1.0, 1.0, 1.0 }, /* '<S956>/sincos' */
1.0, /* '<S956>/Fcn11' */
0.0, /* '<S956>/Fcn21' */
0.0, /* '<S956>/Fcn31' */
0.0, /* '<S956>/Fcn12' */
1.0, /* '<S956>/Fcn22' */
0.0, /* '<S956>/Fcn32' */
-0.0, /* '<S956>/Fcn13' */
0.0, /* '<S956>/Fcn23' */
1.0, /* '<S956>/Fcn33' */
{ 1.0, 0.0, 0.0, 0.0, 1.0, 0.0, -0.0, 0.0, 1.0 },/* '<S1047>/Vector Concatenate' */
0.99664718933525254, /* '<S1125>/Sum' */
0.99330562000985867, /* '<S1125>/Product3' */
0.00669437999014133, /* '<S1125>/Sum2' */
@@ -113,7 +96,7 @@ const ConstB_ET39_SIL_T ET39_SIL_ConstB = {
45U, /* '<S1327>/Width1' */
73U, /* '<S1331>/Width1' */
65U, /* '<S1330>/Width1' */
99U, /* '<S1335>/Width1' */
103U, /* '<S1335>/Width1' */
104U, /* '<S1334>/Width1' */
101U, /* '<S1333>/Width1' */
124U, /* '<S1332>/Width1' */
@@ -129,7 +112,7 @@ const ConstB_ET39_SIL_T ET39_SIL_ConstB = {
40U, /* '<S1327>/Width' */
68U, /* '<S1331>/Width' */
60U, /* '<S1330>/Width' */
94U, /* '<S1335>/Width' */
98U, /* '<S1335>/Width' */
99U, /* '<S1334>/Width' */
96U, /* '<S1333>/Width' */
119U, /* '<S1332>/Width' */
@@ -930,7 +913,7 @@ P_ET39_SIL_T ET39_SIL_P = {
/* Variable: mc_min_az
* Referenced by: '<S25>/mc_min_az'
*/
8.0F,
7.0F,
/* Variable: mc_min_hdot
* Referenced by: '<S25>/mc_max_hdot1'
@@ -965,7 +948,7 @@ P_ET39_SIL_T ET39_SIL_P = {
/* Variable: mc_w_hover
* Referenced by: '<S10>/Constant46'
*/
0.8F,
1.2F,
/* Variable: mc_w_p
* Referenced by: '<S23>/mc_w_p'
@@ -1075,7 +1058,7 @@ P_ET39_SIL_T ET39_SIL_P = {
* '<S10>/Constant30'
* '<S33>/Constant1'
*/
{ 1033.0F, 1896.0F },
{ 1050.0F, 1896.0F },
/* Variable: prop_pwm_lst2
* Referenced by: '<S1319>/Constant1'
@@ -1155,7 +1138,7 @@ P_ET39_SIL_T ET39_SIL_P = {
/* Variable: volt0
* Referenced by: '<S10>/Constant BP1'
*/
48.0F,
48000.0F,
/* Variable: washout_r_den
* Referenced by: '<S10>/Constant40'
@@ -1253,37 +1236,72 @@ const ConstP_ET39_SIL_T ET39_SIL_ConstP = {
84U,
1U,
{ 0.0F, 0.0F, 0.0F, 0.0F, 55.0F },
{ 0.0F, 0.0F, 0.0F, 0.0F, 50.0F },
{ 318236463, 1187816754 }
{ 409219636, 1096188147 }
}, { 3U,
16U,
1U,
{ 0.0F, 100.0F, 250.0F, 0.0F, 60.0F },
{ 0.0F, 5.0F, 0.0F, 0.0F, 50.0F },
{ 318323879, 1187806429 }
{ 409229947, 1096228816 }
}, { 3U,
16U,
1U,
{ 0.0F, 100.0F, 250.0F, 0.0F, 80.0F },
{ 0.0F, 50.0F, 200.0F, 0.0F, 60.0F },
{ 318336921, 1187858216 }
{ 409242802, 1096279285 }
}, { 3U,
16U,
1U,
{ 0.0F, 100.0F, 250.0F, 0.0F, 60.0F },
{ 0.0F, 50.0F, 200.0F, 0.0F, 70.0F },
{ 318288506, 1187865570 }
{ 409279022, 1096265266 }
}, { 3U,
16U,
1U,
{ 0.0F, 100.0F, 250.0F, 0.0F, 50.0F },
{ 0.0F, 50.0F, 200.0F, 0.0F, 70.0F },
{ 318281933, 1187803392 }
{ 409280889, 1096150289 }
}, { 3U,
16U,
1U,
{ 0.0F, 50.0F, 200.0F, 0.0F, 50.0F },
{ 409220116, 1096172527 }
}, { 3U,
16U,
1U,
{ 0.0F, 50.0F, 200.0F, 0.0F, 60.0F },
{ 409245012, 1096278457 }
}, { 3U,
16U,
1U,
{ 0.0F, 50.0F, 200.0F, 0.0F, 70.0F },
{ 409280993, 1096264677 }
}, { 3U,
16U,
1U,
{ 0.0F, 50.0F, 200.0F, 0.0F, 70.0F },
{ 409283154, 1096149244 }
}, { 3U,
16U,
1U,
{ 0.0F, 5.0F, 200.0F, 0.0F, 50.0F },
{ 409246534, 1096162703 }
}, { 2U,
178U,
1U,
@@ -1297,42 +1315,7 @@ const ConstP_ET39_SIL_T ET39_SIL_ConstP = {
{ 0.0F, 0.0F, 0.0F, 0.0F, 50.0F },
{ 318241061, 1187814212 }
}, { 0U,
0U,
0U,
{ 0.0F, 0.0F, 0.0F, 0.0F, 0.0F },
{ 0, 0 }
}, { 0U,
0U,
0U,
{ 0.0F, 0.0F, 0.0F, 0.0F, 0.0F },
{ 0, 0 }
}, { 0U,
0U,
0U,
{ 0.0F, 0.0F, 0.0F, 0.0F, 0.0F },
{ 0, 0 }
}, { 0U,
0U,
0U,
{ 0.0F, 0.0F, 0.0F, 0.0F, 0.0F },
{ 0, 0 }
}, { 0U,
0U,
0U,
{ 0.0F, 0.0F, 0.0F, 0.0F, 0.0F },
{ 0, 0 }
{ 409220834, 1096187631 }
}, { 0U,
0U,
0U,
@@ -5,7 +5,7 @@
*
* Model version : 1.1206
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Jul 31 16:19:43 2021
* C/C++ source code generated on : Sun Aug 1 11:52:22 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -5,7 +5,7 @@
*
* Model version : 1.1206
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Jul 31 16:19:43 2021
* C/C++ source code generated on : Sun Aug 1 11:52:22 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)
Binary file not shown.
@@ -5,7 +5,7 @@
*
* Model version : 1.1206
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sat Jul 31 16:19:43 2021
* C/C++ source code generated on : Sun Aug 1 11:52:22 2021
*
* Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64)