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update gencode, new 4 missions

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This commit is contained in:
matt on matebook
2022-04-12 07:39:52 +08:00
parent 737a7f4c2a
commit af18523dc9
10 changed files with 675 additions and 629 deletions
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SIL/work/SIL_ert_shrlib_rtw/SIL.c
+604 -558
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File diff suppressed because it is too large Load Diff
SIL/work/SIL_ert_shrlib_rtw/SIL.h
+1 -1
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@@ -5,7 +5,7 @@
* *
* Model version : 1.670 * Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018 * Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sun Apr 10 13:53:58 2022 * C/C++ source code generated on : Tue Apr 12 07:34:53 2022
* *
* Target selection: ert_shrlib.tlc * Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64) * Embedded hardware selection: Intel->x86-64 (Windows64)
SIL/work/SIL_ert_shrlib_rtw/SIL_capi.c
+5 -5
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@@ -5,7 +5,7 @@
* *
* Model version : 1.670 * Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018 * Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sun Apr 10 13:53:58 2022 * C/C++ source code generated on : Tue Apr 12 07:34:53 2022
* *
* Target selection: ert_shrlib.tlc * Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64) * Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -710,10 +710,10 @@ static rtwCAPI_ModelMappingStaticInfo mmiStatic = {
rtElementMap, rtSampleTimeMap, rtDimensionArray }, rtElementMap, rtSampleTimeMap, rtDimensionArray },
"float", "float",
{ 3690068348U, { 2774685350U,
1595794047U, 2885114294U,
3212144371U, 2577663853U,
2080467901U }, 908780154U },
(NULL), 0, (NULL), 0,
0 0
}; };
SIL/work/SIL_ert_shrlib_rtw/SIL_capi.h
+1 -1
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@@ -5,7 +5,7 @@
* *
* Model version : 1.670 * Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018 * Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sun Apr 10 13:53:58 2022 * C/C++ source code generated on : Tue Apr 12 07:34:53 2022
* *
* Target selection: ert_shrlib.tlc * Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64) * Embedded hardware selection: Intel->x86-64 (Windows64)
SIL/work/SIL_ert_shrlib_rtw/SIL_data.c
+61 -61
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@@ -5,7 +5,7 @@
* *
* Model version : 1.670 * Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018 * Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sun Apr 10 13:53:58 2022 * C/C++ source code generated on : Tue Apr 12 07:34:53 2022
* *
* Target selection: ert_shrlib.tlc * Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64) * Embedded hardware selection: Intel->x86-64 (Windows64)
@@ -901,72 +901,86 @@ const ConstP_SIL_T SIL_ConstP = {
16U, 16U,
1U, 1U,
{ -2.0F, 300.0F, 0.0F, 150.0F, 11000.0F }, { -2.0F, 500.0F, 8000.0F, 150.0F, 11000.0F },
{ 408647099, 1092773265 } { 407961377, 1092700195 }
}, { 0U, }, { 0U,
16U, 16U,
1U, 1U,
{ 0.0F, 5.0F, 0.0F, 0.0F, 11000.0F }, { 0.0F, 500.0F, 8000.0F, 0.0F, 11000.0F },
{ 408647099, 1092150626 } { 407956179, 1092185211 }
}, { 0U, }, { 0U,
16U, 16U,
1U, 1U,
{ 0.0F, 500.0F, 10000.0F, 0.0F, 11000.0F }, { 0.0F, 500.0F, 9000.0F, 0.0F, 11000.0F },
{ 408647099, 1090000000 } { 407956179, 1090008544 }
}, { 0U, }, { 0U,
16U, 16U,
1U, 1U,
{ -1.0F, 100.0F, 0.0F, 150.0F, 11000.0F }, { -1.0F, 100.0F, 0.0F, 150.0F, 11000.0F },
{ 409799998, 1090000000 } { 408799999, 1090001678 }
}, { 0U, }, { 0U,
16U, 16U,
1U, 1U,
{ -3.0F, 5.0F, 0.0F, 160.0F, 11000.0F }, { -3.0F, 5.0F, 0.0F, 160.0F, 11000.0F },
{ 416780405, 1089994812 } { 415770000, 1089981079 }
}, { 0U, }, { 0U,
16U, 16U,
1U, 1U,
{ -4.0F, 10.0F, 0.0F, 160.0F, 11000.0F }, { -4.0F, 10.0F, 0.0F, 160.0F, 11000.0F },
{ 417200805, 1089994812 } { 416200000, 1089981079 }
}, { 0U, }, { 0U,
16U, 16U,
1U, 1U,
{ -1.0F, 500.0F, 12000.0F, 150.0F, 11000.0F }, { -1.0F, 500.0F, 12000.0F, 150.0F, 11000.0F },
{ 420000000, 1089994812 } { 417800000, 1089994812 }
}, { 0U, }, { 0U,
16U, 16U,
1U, 1U,
{ -1.0F, 500.0F, 12000.0F, 120.0F, 11000.0F }, { -1.0F, 500.0F, 12000.0F, 120.0F, 11000.0F },
{ 420000000, 1091835021 } { 417800000, 1091835021 }
}, { 0U, }, { 0U,
16U, 16U,
1U, 1U,
{ 0.0F, 500.0F, 12000.0F, 0.0F, 11000.0F }, { 0.0F, 500.0F, 12000.0F, 0.0F, 10000.0F },
{ 420000000, 1093500000 } { 417800000, 1096000000 }
}, { 0U, }, { 0U,
16U, 16U,
1U, 1U,
{ -1.0F, 500.0F, 9000.0F, 100.0F, 2000.0F }, { 0.0F, 500.0F, 8000.0F, 0.0F, 7000.0F },
{ 408644585, 1093500000 } { 413000000, 1096000000 }
}, { 0U,
16U,
1U,
{ 0.0F, 500.0F, 8000.0F, 0.0F, 6000.0F },
{ 413000000, 1093500000 }
}, { 0U,
16U,
1U,
{ -1.0F, 500.0F, 8000.0F, 100.0F, 2000.0F },
{ 408636797, 1093496704 }
}, { 0U, }, { 0U,
21U, 21U,
1U, 1U,
@@ -1570,40 +1584,26 @@ const ConstP_SIL_T SIL_ConstP = {
{ 0, 0 } { 0, 0 }
}, { 0U, }, { 0U,
0U, 16U,
0U, 1U,
{ 0.0F, 0.0F, 0.0F, 0.0F, 0.0F }, { 0.0F, 500.0F, 12000.0F, 0.0F, 11000.0F },
{ 0, 0 } { 420000000, 1093500000 }
}, { 0U,
0U,
0U,
{ 0.0F, 0.0F, 0.0F, 0.0F, 0.0F },
{ 0, 0 }
}, { 0U, }, { 0U,
16U, 16U,
1U, 1U,
{ 0.0F, 500.0F, 9000.0F, 0.0F, 9000.0F }, { -1.0F, 500.0F, 9000.0F, 100.0F, 2000.0F },
{ 418503459, 1092481403 } { 408644585, 1093500000 }
}, { 0U,
16U,
1U,
{ -1.0F, 500.0F, 9000.0F, 100.0F, 1750.0F },
{ 408647096, 1092338720 }
}, { 0U, }, { 0U,
21U, 21U,
1U, 1U,
{ 1500.0F, 0.0F, 0.0F, 0.0F, 1750.0F }, { 1500.0F, 0.0F, 0.0F, 0.0F, 1750.0F },
{ 408647166, 1095221051 } { 408645235, 1095234200 }
}, { 0U, }, { 0U,
0U, 0U,
0U, 0U,
@@ -1934,26 +1934,26 @@ const ConstP_SIL_T SIL_ConstP = {
{ 0, 0 } { 0, 0 }
}, { 0U, }, { 0U,
0U, 16U,
0U, 1U,
{ 0.0F, 0.0F, 0.0F, 0.0F, 0.0F }, { 0.0F, 500.0F, 12000.0F, 0.0F, 11000.0F },
{ 0, 0 } { 420000000, 1097500000 }
}, { 0U, }, { 0U,
0U, 16U,
0U, 1U,
{ 0.0F, 0.0F, 0.0F, 0.0F, 0.0F }, { -1.0F, 500.0F, 9000.0F, 100.0F, 2000.0F },
{ 0, 0 } { 408644585, 1097500000 }
}, { 0U, }, { 0U,
0U, 21U,
0U, 1U,
{ 0.0F, 0.0F, 0.0F, 0.0F, 0.0F }, { 1500.0F, 0.0F, 0.0F, 0.0F, 1750.0F },
{ 0, 0 } { 408645235, 1095650000 }
}, { 0U, }, { 0U,
0U, 0U,
0U, 0U,
@@ -2284,26 +2284,26 @@ const ConstP_SIL_T SIL_ConstP = {
{ 0, 0 } { 0, 0 }
}, { 0U, }, { 0U,
0U, 16U,
0U, 1U,
{ 0.0F, 0.0F, 0.0F, 0.0F, 0.0F }, { 0.0F, 500.0F, 12000.0F, 0.0F, 11000.0F },
{ 0, 0 } { 420000000, 1093500000 }
}, { 0U, }, { 0U,
0U, 16U,
0U, 1U,
{ 0.0F, 0.0F, 0.0F, 0.0F, 0.0F }, { -1.0F, 500.0F, 9000.0F, 100.0F, 2000.0F },
{ 0, 0 } { 413300000, 1093500000 }
}, { 0U, }, { 0U,
0U, 21U,
0U, 1U,
{ 0.0F, 0.0F, 0.0F, 0.0F, 0.0F }, { 1500.0F, 0.0F, 0.0F, 0.0F, 1750.0F },
{ 0, 0 } { 413300000, 1094860000 }
}, { 0U, }, { 0U,
0U, 0U,
0U, 0U,
SIL/work/SIL_ert_shrlib_rtw/SIL_private.h
+1 -1
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@@ -5,7 +5,7 @@
* *
* Model version : 1.670 * Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018 * Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sun Apr 10 13:53:58 2022 * C/C++ source code generated on : Tue Apr 12 07:34:53 2022
* *
* Target selection: ert_shrlib.tlc * Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64) * Embedded hardware selection: Intel->x86-64 (Windows64)
SIL/work/SIL_ert_shrlib_rtw/SIL_types.h
+1 -1
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@@ -5,7 +5,7 @@
* *
* Model version : 1.670 * Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018 * Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sun Apr 10 13:53:58 2022 * C/C++ source code generated on : Tue Apr 12 07:34:53 2022
* *
* Target selection: ert_shrlib.tlc * Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64) * Embedded hardware selection: Intel->x86-64 (Windows64)
SIL/work/SIL_ert_shrlib_rtw/buildInfo.mat
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SIL/work/SIL_ert_shrlib_rtw/rtmodel.h
+1 -1
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@@ -5,7 +5,7 @@
* *
* Model version : 1.670 * Model version : 1.670
* Simulink Coder version : 9.0 (R2018b) 24-May-2018 * Simulink Coder version : 9.0 (R2018b) 24-May-2018
* C/C++ source code generated on : Sun Apr 10 13:53:58 2022 * C/C++ source code generated on : Tue Apr 12 07:34:53 2022
* *
* Target selection: ert_shrlib.tlc * Target selection: ert_shrlib.tlc
* Embedded hardware selection: Intel->x86-64 (Windows64) * Embedded hardware selection: Intel->x86-64 (Windows64)
SIL/work/SIL_win64.dll
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