diff --git a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/buildInfo.mat b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/buildInfo.mat index 934901a..6e95af9 100644 Binary files a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/buildInfo.mat and b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/buildInfo.mat differ diff --git a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL.c b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL.c index 7bcacc5..90c0ed9 100644 --- a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL.c +++ b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL.c @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'cr929_SIL'. * - * Model version : 1.1410 + * Model version : 1.1416 * Simulink Coder version : 9.0 (R2018b) 24-May-2018 - * C/C++ source code generated on : Fri Aug 27 09:43:15 2021 + * C/C++ source code generated on : Sat Aug 28 09:08:15 2021 * * Target selection: ert_shrlib.tlc * Embedded hardware selection: Intel->x86-64 (Windows64) @@ -14103,8 +14103,8 @@ void cr929_SIL_step(void) * */ LookUp_real_Treal32_T_real32_T( &(cr929_SIL_B.LookupTableDynamic_k), - rtCP_Constant1_Value_mr, rtb_DataTypeConversion_a, - rtCP_Constant_Value_oj, 2U); + &cr929_SIL_P.dar_pos[0], rtb_DataTypeConversion_a, &cr929_SIL_P.dar_pwm + [0], 2U); /* S-Function (sfix_bitop): '/Bitwise AND1' incorporates: * Inport: '/fault' diff --git a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL.h b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL.h index eecff90..d7f4167 100644 --- a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL.h +++ b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL.h @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'cr929_SIL'. * - * Model version : 1.1410 + * Model version : 1.1416 * Simulink Coder version : 9.0 (R2018b) 24-May-2018 - * C/C++ source code generated on : Fri Aug 27 09:43:15 2021 + * C/C++ source code generated on : Sat Aug 28 09:08:15 2021 * * Target selection: ert_shrlib.tlc * Embedded hardware selection: Intel->x86-64 (Windows64) @@ -3095,10 +3095,14 @@ struct P_cr929_SIL_T_ { * Referenced by: '/da2dar_deg' */ real32_T dar_pos[3]; /* Variable: dar_pos - * Referenced by: '/1-D Lookup Table3' + * Referenced by: + * '/Constant1' + * '/1-D Lookup Table3' */ real32_T dar_pwm[3]; /* Variable: dar_pwm - * Referenced by: '/1-D Lookup Table3' + * Referenced by: + * '/Constant' + * '/1-D Lookup Table3' */ real32_T ddf_c; /* Variable: ddf_c * Referenced by: '/Constant6' diff --git a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_capi.c b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_capi.c index dceeba9..8eeb66a 100644 --- a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_capi.c +++ b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_capi.c @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'cr929_SIL'. * - * Model version : 1.1410 + * Model version : 1.1416 * Simulink Coder version : 9.0 (R2018b) 24-May-2018 - * C/C++ source code generated on : Fri Aug 27 09:43:15 2021 + * C/C++ source code generated on : Sat Aug 28 09:08:15 2021 * * Target selection: ert_shrlib.tlc * Embedded hardware selection: Intel->x86-64 (Windows64) @@ -927,10 +927,10 @@ static rtwCAPI_ModelMappingStaticInfo mmiStatic = { rtElementMap, rtSampleTimeMap, rtDimensionArray }, "float", - { 2374771146U, - 360718284U, - 1026861645U, - 837405641U }, + { 218669257U, + 2347421338U, + 1626222349U, + 1501962824U }, (NULL), 0, 0 }; diff --git a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_capi.h b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_capi.h index 24d846e..5514205 100644 --- a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_capi.h +++ b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_capi.h @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'cr929_SIL'. * - * Model version : 1.1410 + * Model version : 1.1416 * Simulink Coder version : 9.0 (R2018b) 24-May-2018 - * C/C++ source code generated on : Fri Aug 27 09:43:15 2021 + * C/C++ source code generated on : Sat Aug 28 09:08:15 2021 * * Target selection: ert_shrlib.tlc * Embedded hardware selection: Intel->x86-64 (Windows64) diff --git a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_data.c b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_data.c index f19529a..af7010c 100644 --- a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_data.c +++ b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_data.c @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'cr929_SIL'. * - * Model version : 1.1410 + * Model version : 1.1416 * Simulink Coder version : 9.0 (R2018b) 24-May-2018 - * C/C++ source code generated on : Fri Aug 27 09:43:15 2021 + * C/C++ source code generated on : Sat Aug 28 09:08:15 2021 * * Target selection: ert_shrlib.tlc * Embedded hardware selection: Intel->x86-64 (Windows64) @@ -225,7 +225,7 @@ P_cr929_SIL_T cr929_SIL_P = { /* Variable: wind_east * Referenced by: '/wind_East' */ - { -3.0, -20.0 }, + { -1.0, -5.0 }, /* Variable: wind_level * Referenced by: @@ -237,7 +237,7 @@ P_cr929_SIL_T cr929_SIL_P = { /* Variable: wind_north * Referenced by: '/wind_North' */ - { 3.0, 20.0 }, + { 1.0, 5.0 }, /* Variable: CLa * Referenced by: '/Constant Single1' @@ -480,7 +480,7 @@ P_cr929_SIL_T cr929_SIL_P = { /* Variable: dal_pwm * Referenced by: '/1-D Lookup Table8' */ - { 1144.0F, 1548.0F, 1860.0F }, + { 1808.0F, 1400.0F, 1096.0F }, /* Variable: dar_list * Referenced by: '/da2dar_deg' @@ -494,14 +494,18 @@ P_cr929_SIL_T cr929_SIL_P = { { -30.0F, 0.0F, 20.0F }, /* Variable: dar_pos - * Referenced by: '/1-D Lookup Table3' + * Referenced by: + * '/Constant1' + * '/1-D Lookup Table3' */ { -0.523599F, 0.0F, 0.349066287F }, /* Variable: dar_pwm - * Referenced by: '/1-D Lookup Table3' + * Referenced by: + * '/Constant' + * '/1-D Lookup Table3' */ - { 1808.0F, 1400.0F, 1096.0F }, + { 1144.0F, 1548.0F, 1860.0F }, /* Variable: ddf_c * Referenced by: '/Constant6' @@ -559,7 +563,7 @@ P_cr929_SIL_T cr929_SIL_P = { /* Variable: dflii_pwm * Referenced by: '/1-D Lookup Table13' */ - { 1048.0F, 1400.0F, 1492.0F, 1640.0F, 1880.0F }, + { 1048.0F, 1400.0F, 1492.0F, 1650.0F, 1880.0F }, /* Variable: dflio_pos * Referenced by: '/1-D Lookup Table17' @@ -569,7 +573,7 @@ P_cr929_SIL_T cr929_SIL_P = { /* Variable: dflio_pwm * Referenced by: '/1-D Lookup Table17' */ - { 1092.0F, 1228.0F, 1372.0F, 1524.0F, 1752.0F }, + { 1092.0F, 1228.0F, 1372.0F, 1520.0F, 1752.0F }, /* Variable: dflo2_pos * Referenced by: '/1-D Lookup Table15' @@ -599,7 +603,7 @@ P_cr929_SIL_T cr929_SIL_P = { /* Variable: dfrii_pwm * Referenced by: '/1-D Lookup Table14' */ - { 1876.0F, 1612.0F, 1360.0F, 1192.0F, 1080.0F }, + { 1876.0F, 1612.0F, 1360.0F, 1272.0F, 1080.0F }, /* Variable: dfrio_pos * Referenced by: '/1-D Lookup Table10' @@ -609,7 +613,7 @@ P_cr929_SIL_T cr929_SIL_P = { /* Variable: dfrio_pwm * Referenced by: '/1-D Lookup Table10' */ - { 1956.0F, 1788.0F, 1652.0F, 1504.0F, 1284.0F }, + { 1956.0F, 1788.0F, 1652.0F, 1524.0F, 1284.0F }, /* Variable: dfro2_pos * Referenced by: '/1-D Lookup Table16' @@ -674,7 +678,7 @@ P_cr929_SIL_T cr929_SIL_P = { /* Variable: drd_pwm * Referenced by: '/1-D Lookup Table' */ - { 1856.0F, 1504.0F, 1128.0F }, + { 1856.0F, 1498.0F, 1128.0F }, /* Variable: dru_pos * Referenced by: '/1-D Lookup Table6' @@ -1458,14 +1462,14 @@ const ConstP_cr929_SIL_T cr929_SIL_ConstP = { { 0.0F, 50.0F, 500.0F, 0.0F, 500.0F }, - { 407258448, 1102331272 } + { 407258283, 1102331599 } }, { 3U, 16U, 1U, { 0.0F, 50.0F, 500.0F, 0.0F, 500.0F }, - { 407113395, 1102537311 } + { 407114869, 1102536195 } }, { 3U, 16U, 1U, @@ -1486,14 +1490,14 @@ const ConstP_cr929_SIL_T cr929_SIL_ConstP = { { 0.0F, 50.0F, 500.0F, 0.0F, 500.0F }, - { 407254364, 1102326207 } + { 407263179, 1102337839 } }, { 3U, 16U, 1U, { 0.0F, 50.0F, 500.0F, 0.0F, 500.0F }, - { 407104292, 1102542201 } + { 407109541, 1102543449 } }, { 3U, 16U, 1U, @@ -1521,21 +1525,21 @@ const ConstP_cr929_SIL_T cr929_SIL_ConstP = { { 0.0F, 50.0F, 500.0F, 0.0F, 350.0F }, - { 407285129, 1102304514 } + { 407282966, 1102296767 } }, { 3U, 16U, 1U, - { 0.0F, 50.0F, 500.0F, 0.0F, 140.0F }, + { 0.0F, 50.0F, 500.0F, 0.0F, 130.0F }, - { 407034069, 1102659457 } + { 407002623, 1102696035 } }, { 3U, 16U, 1U, { 0.0F, 50.0F, 500.0F, 0.0F, 70.0F }, - { 406941507, 1102561626 } + { 406921851, 1102593004 } }, { 3U, 21U, 1U, diff --git a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_private.h b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_private.h index f51719a..2e7f6ef 100644 --- a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_private.h +++ b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_private.h @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'cr929_SIL'. * - * Model version : 1.1410 + * Model version : 1.1416 * Simulink Coder version : 9.0 (R2018b) 24-May-2018 - * C/C++ source code generated on : Fri Aug 27 09:43:15 2021 + * C/C++ source code generated on : Sat Aug 28 09:08:15 2021 * * Target selection: ert_shrlib.tlc * Embedded hardware selection: Intel->x86-64 (Windows64) @@ -240,8 +240,6 @@ extern const real32_T rtCP_pooled_2XTNfxxllKmQ[3]; extern const real32_T rtCP_pooled_eU0yzXhoTZXt[3]; extern const real32_T rtCP_pooled_j6BLsTdMk7qD[3]; extern const real32_T rtCP_pooled_yWVMTaHackMS[3]; -extern const real32_T rtCP_pooled_rYM1L1wOm55A[3]; -extern const real32_T rtCP_pooled_H5asl5rOUZUB[3]; extern const uint32_T rtCP_pooled_BWTVQM0GuqkK[2]; extern const uint32_T rtCP_pooled_52mPzBGwtz3T[2]; extern const uint32_T rtCP_pooled_VOMI4P330Dae[2]; @@ -1579,12 +1577,6 @@ extern const uint8_T rtCP_pooled_mDbfc7f8L4g9; #define rtCP_Constant1_Value_bh rtCP_pooled_yWVMTaHackMS /* Expression: flip(dru_pos) * Referenced by: '/Constant1' */ -#define rtCP_Constant_Value_oj rtCP_pooled_rYM1L1wOm55A /* Expression: flip(dar_pwm) - * Referenced by: '/Constant' - */ -#define rtCP_Constant1_Value_mr rtCP_pooled_H5asl5rOUZUB /* Expression: flip(dar_pos) - * Referenced by: '/Constant1' - */ #define rtCP_MediumHighAltitudeIntensity_maxIndex rtCP_pooled_BWTVQM0GuqkK/* Computed Parameter: rtCP_MediumHighAltitudeIntensity_maxIndex * Referenced by: '/Medium//High Altitude Intensity' */ diff --git a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_types.h b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_types.h index 9a3168e..970a800 100644 --- a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_types.h +++ b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/cr929_SIL_types.h @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'cr929_SIL'. * - * Model version : 1.1410 + * Model version : 1.1416 * Simulink Coder version : 9.0 (R2018b) 24-May-2018 - * C/C++ source code generated on : Fri Aug 27 09:43:15 2021 + * C/C++ source code generated on : Sat Aug 28 09:08:15 2021 * * Target selection: ert_shrlib.tlc * Embedded hardware selection: Intel->x86-64 (Windows64) diff --git a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/rtmodel.h b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/rtmodel.h index b44d0b0..36c1975 100644 --- a/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/rtmodel.h +++ b/cr929_SIL/work/cr929_SIL_ert_shrlib_rtw/rtmodel.h @@ -3,9 +3,9 @@ * * Code generated for Simulink model 'cr929_SIL'. * - * Model version : 1.1410 + * Model version : 1.1416 * Simulink Coder version : 9.0 (R2018b) 24-May-2018 - * C/C++ source code generated on : Fri Aug 27 09:43:15 2021 + * C/C++ source code generated on : Sat Aug 28 09:08:15 2021 * * Target selection: ert_shrlib.tlc * Embedded hardware selection: Intel->x86-64 (Windows64)