2020-10-05 10:41:44 +08:00
|
|
|
/*
|
|
|
|
|
* File: rtmodel.h
|
|
|
|
|
*
|
|
|
|
|
* Code generated for Simulink model 'SIL'.
|
|
|
|
|
*
|
2020-12-02 07:41:26 +08:00
|
|
|
* Model version : 1.523
|
2020-10-05 10:41:44 +08:00
|
|
|
* Simulink Coder version : 9.0 (R2018b) 24-May-2018
|
2020-12-02 09:59:07 +08:00
|
|
|
* C/C++ source code generated on : Wed Dec 2 09:48:16 2020
|
2020-10-05 10:41:44 +08:00
|
|
|
*
|
|
|
|
|
* Target selection: ert_shrlib.tlc
|
|
|
|
|
* Embedded hardware selection: Intel->x86-64 (Windows64)
|
|
|
|
|
* Code generation objectives: Unspecified
|
|
|
|
|
* Validation result: Not run
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#ifndef RTW_HEADER_rtmodel_h_
|
|
|
|
|
#define RTW_HEADER_rtmodel_h_
|
|
|
|
|
#include "SIL.h"
|
|
|
|
|
#endif /* RTW_HEADER_rtmodel_h_ */
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* File trailer for generated code.
|
|
|
|
|
*
|
|
|
|
|
* [EOF]
|
|
|
|
|
*/
|