#ifndef __CMSIS_GCC_H__
#define __CMSIS_GCC_H__

#include <stdint.h>

#define __DMB()       __asm volatile ("dmb" ::: "memory")
#define __DSB()       __asm volatile ("dsb" ::: "memory")
#define __ISB()       __asm volatile ("isb" ::: "memory")
#define __NOP()       __asm volatile ("nop")
#define __WFI()       __asm volatile ("wfi")
#define __WFE()       __asm volatile ("wfe")
#define __SEV()       __asm volatile ("sev")

__STATIC_INLINE uint32_t __get_PSP(void)
{
    uint32_t result;
    __ASM volatile ("MRS %0, psp" : "=r" (result));
    return result;
}

__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
{
    __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack));
}

__STATIC_INLINE uint32_t __get_MSP(void)
{
    uint32_t result;
    __ASM volatile ("MRS %0, msp" : "=r" (result));
    return result;
}

__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
{
    __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack));
}

__STATIC_INLINE uint32_t __get_PRIMASK(void)
{
    uint32_t result;
    __ASM volatile ("MRS %0, primask" : "=r" (result));
    return result;
}

__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
{
    __ASM volatile ("MSR primask, %0" : : "r" (priMask));
}

__STATIC_INLINE void __enable_irq(void)
{
    __ASM volatile ("cpsie i" ::: "memory");
}

__STATIC_INLINE void __disable_irq(void)
{
    __ASM volatile ("cpsid i" ::: "memory");
}

__STATIC_INLINE uint32_t __get_CONTROL(void)
{
    uint32_t result;
    __ASM volatile ("MRS %0, control" : "=r" (result));
    return result;
}

__STATIC_INLINE void __set_CONTROL(uint32_t control)
{
    __ASM volatile ("MSR control, %0" : : "r" (control));
}

__STATIC_INLINE void __BKPT(uint32_t value)
{
    __ASM volatile ("bkpt %0" : : "i" (value));
}

__STATIC_INLINE uint32_t __RBIT(uint32_t value)
{
    uint32_t result;
    __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value));
    return result;
}

__STATIC_INLINE uint32_t __REV(uint32_t value)
{
    uint32_t result;
    __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value));
    return result;
}

__STATIC_INLINE uint32_t __REV16(uint32_t value)
{
    uint32_t result;
    __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value));
    return result;
}

__STATIC_INLINE int32_t __REVSH(int32_t value)
{
    int32_t result;
    __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value));
    return result;
}

__STATIC_INLINE uint32_t __RRX(uint32_t value)
{
    uint32_t result;
    __ASM volatile ("rrx %0, %1" : "=r" (result) : "r" (value));
    return result;
}

__STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
{
    uint32_t result;
    __ASM volatile ("ror %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2));
    return result;
}

__STATIC_INLINE uint32_t __LDREXB(uint8_t *addr)
{
    uint32_t result;
    __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr));
    return result;
}

__STATIC_INLINE uint32_t __LDREXH(uint16_t *addr)
{
    uint32_t result;
    __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr));
    return result;
}

__STATIC_INLINE uint32_t __LDREXW(uint32_t *addr)
{
    uint32_t result;
    __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr));
    return result;
}

__STATIC_INLINE uint32_t __STREXB(uint8_t value, uint8_t *addr)
{
    uint32_t result;
    __ASM volatile ("strexb %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value));
    return result;
}

__STATIC_INLINE uint32_t __STREXH(uint16_t value, uint16_t *addr)
{
    uint32_t result;
    __ASM volatile ("strexh %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value));
    return result;
}

__STATIC_INLINE uint32_t __STREXW(uint32_t value, uint32_t *addr)
{
    uint32_t result;
    __ASM volatile ("strex %0, %2, [%1]" : "=&r" (result) : "r" (addr), "r" (value));
    return result;
}

#endif