260 lines
8.8 KiB
C
260 lines
8.8 KiB
C
/*
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* drv_usart.c
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*
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* Created on: Mar 31, 2023
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* Author: gxms0
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*/
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#include "drv_usart.h"
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/* Global typedef */
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typedef enum
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{
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FAILED = 0,
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PASSED = !FAILED
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} TestStatus;
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/* Global define */
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#define TxSize1 (size(TxBuffer1))
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#define TxSize2 (size(TxBuffer2))
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#define size(a) (sizeof(a) / sizeof(*(a)))
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/* Global Variable */
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u8 TxBuffer1[] = "*Buffer1 Send from USART2 to USART3 using DMA!"; /* Send by UART2 */
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u8 TxBuffer2[] = "#Buffer2 Send from USART3 to USART2 using DMA!"; /* Send by UART3 */
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u8 RxBuffer1[TxSize1] = {0}; /* USART2 Using */
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u8 RxBuffer2[TxSize2] = {0}; /* USART3 Using */
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u8 TxCnt1 = 0, RxCnt1 = 0;
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u8 TxCnt2 = 0, RxCnt2 = 0;
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u8 Rxfinish1 = 0, Rxfinish2 = 0;
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TestStatus TransferStatus1 = FAILED;
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TestStatus TransferStatus2 = FAILED;
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void USART1_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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void USART2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
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/*********************************************************************
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* @fn Buffercmp
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*
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* @brief Compares two buffers
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*
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* @param Buf1,Buf2 - buffers to be compared
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* BufferLength - buffer's length
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*
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* @return PASSED - Buf1 identical to Buf
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* FAILED - Buf1 differs from Buf2
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*/
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TestStatus Buffercmp(uint8_t *Buf1, uint8_t *Buf2, uint16_t BufLength)
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{
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while(BufLength--)
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{
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if(*Buf1 != *Buf2)
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{
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return FAILED;
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}
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Buf1++;
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Buf2++;
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}
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return PASSED;
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}
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/*********************************************************************
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* @fn USARTx_CFG
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*
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* @brief Initializes the USART2 & USART3 peripheral.
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*
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* @return none
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*/
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void USARTx_CFG(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure = {0};
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USART_InitTypeDef USART_InitStructure = {0};
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2 | RCC_APB1Periph_USART3, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB, ENABLE);
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/* USART2 TX-->A.2 RX-->A.3 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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/* USART3 TX-->B.10 RX-->B.11 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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USART_InitStructure.USART_BaudRate = 115200;
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USART_InitStructure.USART_WordLength = USART_WordLength_8b;
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USART_InitStructure.USART_StopBits = USART_StopBits_1;
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USART_InitStructure.USART_Parity = USART_Parity_No;
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USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
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USART_Init(USART2, &USART_InitStructure);
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USART_Init(USART3, &USART_InitStructure);
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DMA_Cmd(DMA1_Channel7, ENABLE); /* USART2 Tx */
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DMA_Cmd(DMA1_Channel6, ENABLE); /* USART2 Rx */
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DMA_Cmd(DMA1_Channel2, ENABLE); /* USART3 Tx */
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DMA_Cmd(DMA1_Channel3, ENABLE); /* USART3 Rx */
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USART_Cmd(USART2, ENABLE);
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USART_Cmd(USART3, ENABLE);
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}
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/*********************************************************************
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* @fn DMA_INIT
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*
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* @brief Configures the DMA for USART2 & USART3.
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*
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* @return none
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*/
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void DMA_INIT(void)
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{
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DMA_InitTypeDef DMA_InitStructure = {0};
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
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DMA_DeInit(DMA1_Channel7);
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&USART2->DATAR); /* USART2->DATAR:0x40004404 */
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32)TxBuffer1;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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DMA_InitStructure.DMA_BufferSize = TxSize1;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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DMA_Init(DMA1_Channel7, &DMA_InitStructure);
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DMA_DeInit(DMA1_Channel6);
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&USART2->DATAR);
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32)RxBuffer1;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
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DMA_InitStructure.DMA_BufferSize = TxSize2;
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DMA_Init(DMA1_Channel6, &DMA_InitStructure);
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DMA_DeInit(DMA1_Channel2);
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&USART3->DATAR); /* USART2->DATAR:0x40004804 */
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DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)TxBuffer2;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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DMA_InitStructure.DMA_BufferSize = TxSize2;
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DMA_Init(DMA1_Channel2, &DMA_InitStructure);
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DMA_DeInit(DMA1_Channel3);
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&USART3->DATAR);
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32)RxBuffer2;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
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DMA_InitStructure.DMA_BufferSize = TxSize1;
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DMA_Init(DMA1_Channel3, &DMA_InitStructure);
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}
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void USART1_Init(uint32_t BaudRate,uint16_t WordLength,uint16_t StopBits,uint16_t Parity)
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{
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GPIO_InitTypeDef GPIO_InitStructure = {0};
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USART_InitTypeDef USART_InitStructure = {0};
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DMA_InitTypeDef DMA_InitStructure = {0};
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1 | RCC_APB2Periph_GPIOA, ENABLE);
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
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DMA_DeInit(DMA1_Channel4);
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&USART1->DATAR);
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32)TxBuffer1;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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DMA_InitStructure.DMA_BufferSize = TxSize1;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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DMA_Init(DMA1_Channel5, &DMA_InitStructure);
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DMA_DeInit(DMA1_Channel5);
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&USART1->DATAR);
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32)RxBuffer1;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
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DMA_InitStructure.DMA_BufferSize = TxSize2;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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DMA_Init(DMA1_Channel5, &DMA_InitStructure);
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/* USART2 TX-->A.9 RX-->A.10 */
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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USART_InitStructure.USART_BaudRate = BaudRate;
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USART_InitStructure.USART_WordLength = WordLength;
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USART_InitStructure.USART_StopBits = StopBits;
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USART_InitStructure.USART_Parity = Parity;
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USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
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USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
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USART_Init(USART1, &USART_InitStructure);
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DMA_Cmd(DMA1_Channel4, ENABLE); /* USART1 Tx */
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DMA_Cmd(DMA1_Channel5, ENABLE); /* USART1 Rx */
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USART_Cmd(USART1, ENABLE);
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}
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void USART1_IRQHandler(void)
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{
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if(USART_GetITStatus(USART1, USART_IT_RXNE) != RESET)
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{
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USART_ClearITPendingBit (USART1, USART_IT_RXNE);
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/* Read one byte from the receive data register */
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USART_ReceiveData(USART1);
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USART_ITConfig(USART1, USART_IT_RXNE, DISABLE);
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}
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}
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void USART2_IRQHandler(void)
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{
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if(USART_GetITStatus(USART2, USART_IT_RXNE) != RESET)
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{
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USART_ClearITPendingBit (USART2, USART_IT_RXNE);
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/* Read one byte from the receive data register */
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USART_ReceiveData(USART2);
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USART_ITConfig(USART2, USART_IT_RXNE, DISABLE);
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}
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}
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