ADC DMA能读取

This commit is contained in:
2023-06-20 23:41:10 +08:00
parent 83ba21b0bd
commit aca0b9b000
30 changed files with 10279 additions and 6492 deletions
+28 -4
View File
@@ -33,6 +33,10 @@ u8 Rxfinish1 = 0, Rxfinish2 = 0;
TestStatus TransferStatus1 = FAILED;
TestStatus TransferStatus2 = FAILED;
void USART1_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void USART2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
/*********************************************************************
* @fn Buffercmp
*
@@ -168,7 +172,7 @@ void USART1_Init(uint32_t BaudRate,uint16_t WordLength,uint16_t StopBits,uint16_
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
DMA_DeInit(DMA1_Channel4);
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&USART1->DATAR); /* USART2->DATAR:0x40004404 */
DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&USART1->DATAR);
DMA_InitStructure.DMA_MemoryBaseAddr = (u32)TxBuffer1;
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
DMA_InitStructure.DMA_BufferSize = TxSize1;
@@ -224,9 +228,29 @@ void USART1_Init(uint32_t BaudRate,uint16_t WordLength,uint16_t StopBits,uint16_
USART_Cmd(USART1, ENABLE);
}
void USART1_IRQHandler(void)
{
if(USART_GetITStatus(USART1, USART_IT_RXNE) != RESET)
{
USART_ClearITPendingBit (USART1, USART_IT_RXNE);
/* Read one byte from the receive data register */
USART_ReceiveData(USART1);
USART_ITConfig(USART1, USART_IT_RXNE, DISABLE);
}
}
void USART2_IRQHandler(void)
{
if(USART_GetITStatus(USART2, USART_IT_RXNE) != RESET)
{
USART_ClearITPendingBit (USART2, USART_IT_RXNE);
/* Read one byte from the receive data register */
USART_ReceiveData(USART2);
USART_ITConfig(USART2, USART_IT_RXNE, DISABLE);
}
}