adc读取正常

This commit is contained in:
2023-07-01 19:53:45 +08:00
parent c2b9721d4b
commit 5b87198936
31 changed files with 21522 additions and 20638 deletions
+138 -2
View File
@@ -8,12 +8,91 @@
#include "drv_tim.h"
#include "Global.h"
void TIM1_UP_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
void TIM5_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
volatile uint32_t tick_ms = 0;
volatile uint32_t tick_us = 0;
uint32_t get_ticks(void)
{
return get_ticks_usec();
}
uint32_t get_ticks_msec(void)
{
return tick_ms;
}
uint32_t get_ticks_usec(void)
{
return tick_us + (float)TIM1->CNT;
}
void delay_s(uint32_t time)
{
uint32_t tick = get_ticks_msec();
while(1)
{
if((get_ticks_msec() - tick) >= (time * 1000))
{
break;
}
}
}
void delay_ms(uint32_t time)
{
uint32_t tick = get_ticks_msec();
while(1)
{
if((get_ticks_msec() - tick) >= time)
{
break;
}
}
}
void delay_us(uint32_t time)
{
uint32_t tick = get_ticks();
while(1)
{
if((get_ticks() - tick) >= time)
{
break;
}
}
}
void TIM1_UP_IRQHandler(void)
{
if( TIM_GetITStatus( TIM1, TIM_IT_Update ) != RESET )
{
tick_us += 1000;
tick_ms++;
TIM_ClearITPendingBit( TIM1, TIM_IT_Update);
}
}
void TIM5_IRQHandler(void)
{
if( TIM_GetITStatus( TIM5, TIM_IT_Update ) != RESET )
{
TIM_ClearITPendingBit(TIM5, TIM_IT_Update);
}
}
void tim_init(void)
{
TIM_BASE_Timer1();
TIM_PWM_Init();
TIM_BASE_Timer5();
}
void TIM_PWM_Init()
@@ -23,6 +102,34 @@ void TIM_PWM_Init()
TIM_PWM_Timer4();
}
void TIM_BASE_Timer1(void)
{
TIM_TimeBaseInitTypeDef TIM_TimeBaseInitStructure={0};
NVIC_InitTypeDef NVIC_InitStructure = {0};
RCC_APB2PeriphClockCmd( RCC_APB2Periph_TIM1, ENABLE );
TIM_TimeBaseInitStructure.TIM_Prescaler = SystemCoreClock/1000000 - 1;//1M
TIM_TimeBaseInitStructure.TIM_Period = 1000000 / TIM1_FRQ - 1;//1000hz
TIM_TimeBaseInitStructure.TIM_ClockDivision = TIM_CKD_DIV1;
TIM_TimeBaseInitStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit( TIM1, &TIM_TimeBaseInitStructure);
TIM_ARRPreloadConfig( TIM1, ENABLE );
TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);
TIM_Cmd( TIM1, ENABLE );
NVIC_InitStructure.NVIC_IRQChannel = TIM1_UP_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}
void TIM_PWM_Timer2()
{
GPIO_InitTypeDef GPIO_InitStructure={0};
@@ -168,5 +275,34 @@ void TIM_PWM_Timer4()
}
void TIM_BASE_Timer5()
{
TIM_TimeBaseInitTypeDef TIM_TimeBaseInitStructure={0};
NVIC_InitTypeDef NVIC_InitStructure = {0};
RCC_APB1PeriphClockCmd( RCC_APB1Periph_TIM5, ENABLE );
RCC_PCLK1Config(RCC_HCLK_Div1);
TIM_TimeBaseInitStructure.TIM_Prescaler = SystemCoreClock/1000000 - 1;//1M
TIM_TimeBaseInitStructure.TIM_Period = 1000000 / TIM5_FRQ - 1;//1000hz
TIM_TimeBaseInitStructure.TIM_ClockDivision = TIM_CKD_DIV1;
TIM_TimeBaseInitStructure.TIM_CounterMode = TIM_CounterMode_Up;
TIM_TimeBaseInit( TIM5, &TIM_TimeBaseInitStructure);
TIM_ARRPreloadConfig( TIM5, ENABLE );
TIM_ITConfig(TIM5, TIM_IT_Update, ENABLE);
TIM_Cmd( TIM5, ENABLE );
NVIC_InitStructure.NVIC_IRQChannel = TIM5_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
}