/*
 * File: control.h
 *
 * Code generated for Simulink model 'control'.
 *
 * Model version                  : 1.249
 * Simulink Coder version         : 24.1 (R2024a) 19-Nov-2023
 * C/C++ source code generated on : Wed Sep 17 15:56:46 2025
 *
 * Target selection: ert.tlc
 * Embedded hardware selection: ARM Compatible->ARM Cortex
 * Code generation objectives: Unspecified
 * Validation result: Not run
 */

#ifndef control_h_
#define control_h_
#ifndef control_COMMON_INCLUDES_
#define control_COMMON_INCLUDES_
#include "rtwtypes.h"
#include "rtw_continuous.h"
#include "rtw_solver.h"
#include "rt_nonfinite.h"
#include "math.h"
#endif                                 /* control_COMMON_INCLUDES_ */

#include <stddef.h>
#include "control_types.h"
#include "rtw_modelmap.h"
#include <string.h>

/* Macros for accessing real-time model data structure */
#ifndef rtmGetContStateDisabled
#define rtmGetContStateDisabled(rtm)   ((rtm)->contStateDisabled)
#endif

#ifndef rtmSetContStateDisabled
#define rtmSetContStateDisabled(rtm, val) ((rtm)->contStateDisabled = (val))
#endif

#ifndef rtmGetContStates
#define rtmGetContStates(rtm)          ((rtm)->contStates)
#endif

#ifndef rtmSetContStates
#define rtmSetContStates(rtm, val)     ((rtm)->contStates = (val))
#endif

#ifndef rtmGetContTimeOutputInconsistentWithStateAtMajorStepFlag
#define rtmGetContTimeOutputInconsistentWithStateAtMajorStepFlag(rtm) ((rtm)->CTOutputIncnstWithState)
#endif

#ifndef rtmSetContTimeOutputInconsistentWithStateAtMajorStepFlag
#define rtmSetContTimeOutputInconsistentWithStateAtMajorStepFlag(rtm, val) ((rtm)->CTOutputIncnstWithState = (val))
#endif

#ifndef rtmGetDataMapInfo
#define rtmGetDataMapInfo(rtm)         ((rtm)->DataMapInfo)
#endif

#ifndef rtmSetDataMapInfo
#define rtmSetDataMapInfo(rtm, val)    ((rtm)->DataMapInfo = (val))
#endif

#ifndef rtmGetDerivCacheNeedsReset
#define rtmGetDerivCacheNeedsReset(rtm) ((rtm)->derivCacheNeedsReset)
#endif

#ifndef rtmSetDerivCacheNeedsReset
#define rtmSetDerivCacheNeedsReset(rtm, val) ((rtm)->derivCacheNeedsReset = (val))
#endif

#ifndef rtmGetIntgData
#define rtmGetIntgData(rtm)            ((rtm)->intgData)
#endif

#ifndef rtmSetIntgData
#define rtmSetIntgData(rtm, val)       ((rtm)->intgData = (val))
#endif

#ifndef rtmGetOdeF
#define rtmGetOdeF(rtm)                ((rtm)->odeF)
#endif

#ifndef rtmSetOdeF
#define rtmSetOdeF(rtm, val)           ((rtm)->odeF = (val))
#endif

#ifndef rtmGetOdeY
#define rtmGetOdeY(rtm)                ((rtm)->odeY)
#endif

#ifndef rtmSetOdeY
#define rtmSetOdeY(rtm, val)           ((rtm)->odeY = (val))
#endif

#ifndef rtmGetPeriodicContStateIndices
#define rtmGetPeriodicContStateIndices(rtm) ((rtm)->periodicContStateIndices)
#endif

#ifndef rtmSetPeriodicContStateIndices
#define rtmSetPeriodicContStateIndices(rtm, val) ((rtm)->periodicContStateIndices = (val))
#endif

#ifndef rtmGetPeriodicContStateRanges
#define rtmGetPeriodicContStateRanges(rtm) ((rtm)->periodicContStateRanges)
#endif

#ifndef rtmSetPeriodicContStateRanges
#define rtmSetPeriodicContStateRanges(rtm, val) ((rtm)->periodicContStateRanges = (val))
#endif

#ifndef rtmGetZCCacheNeedsReset
#define rtmGetZCCacheNeedsReset(rtm)   ((rtm)->zCCacheNeedsReset)
#endif

#ifndef rtmSetZCCacheNeedsReset
#define rtmSetZCCacheNeedsReset(rtm, val) ((rtm)->zCCacheNeedsReset = (val))
#endif

#ifndef rtmGetdX
#define rtmGetdX(rtm)                  ((rtm)->derivs)
#endif

#ifndef rtmSetdX
#define rtmSetdX(rtm, val)             ((rtm)->derivs = (val))
#endif

#ifndef rtmGetErrorStatus
#define rtmGetErrorStatus(rtm)         ((rtm)->errorStatus)
#endif

#ifndef rtmSetErrorStatus
#define rtmSetErrorStatus(rtm, val)    ((rtm)->errorStatus = (val))
#endif

#ifndef rtmGetStopRequested
#define rtmGetStopRequested(rtm)       ((rtm)->Timing.stopRequestedFlag)
#endif

#ifndef rtmSetStopRequested
#define rtmSetStopRequested(rtm, val)  ((rtm)->Timing.stopRequestedFlag = (val))
#endif

#ifndef rtmGetStopRequestedPtr
#define rtmGetStopRequestedPtr(rtm)    (&((rtm)->Timing.stopRequestedFlag))
#endif

#ifndef rtmGetT
#define rtmGetT(rtm)                   (rtmGetTPtr((rtm))[0])
#endif

#ifndef rtmGetTPtr
#define rtmGetTPtr(rtm)                ((rtm)->Timing.t)
#endif

#ifndef rtmGetTStart
#define rtmGetTStart(rtm)              ((rtm)->Timing.tStart)
#endif

/* Block signals (default storage) */
typedef struct {
  real_T uDLookupTable;                /* '<Root>/1-D Lookup Table' */
  real_T uDLookupTable1;               /* '<Root>/1-D Lookup Table1' */
  real_T uDLookupTable2;               /* '<Root>/1-D Lookup Table2' */
  real_T uDLookupTable3;               /* '<Root>/1-D Lookup Table3' */
  real_T uDLookupTable4;               /* '<Root>/1-D Lookup Table4' */
  real_T cmd_temp;                     /* '<Root>/state' */
  real_T cmd_buck_in_relay;            /* '<Root>/state' */
  real_T cmd_buck_out_relay;           /* '<Root>/state' */
  real_T Saturation;                   /* '<S6>/Saturation' */
  uint32_T cmd_pwm_en;                 /* '<Root>/state' */
  uint32_T cmd_CV_mode;                /* '<Root>/state' */
  real32_T Merge1;                     /* '<S6>/Merge1' */
  real32_T Sum;                        /* '<S50>/Sum' */
} B_control_T;

/* Block states (default storage) for system '<Root>' */
typedef struct {
  real32_T Integrator_DSTATE;          /* '<S95>/Integrator' */
  real32_T Filter_DSTATE;              /* '<S90>/Filter' */
  real32_T Filter_DSTATE_i;            /* '<S36>/Filter' */
  real32_T Integrator_DSTATE_f;        /* '<S41>/Integrator' */
  uint32_T temporalCounter_i1;         /* '<Root>/state' */
  uint16_T temporalCounter_i1_c;       /* '<S2>/Chart' */
  uint8_T is_active_c1_control;        /* '<S2>/Chart' */
  uint8_T is_c1_control;               /* '<S2>/Chart' */
  uint8_T is_active_c3_control;        /* '<Root>/state' */
  uint8_T is_c3_control;               /* '<Root>/state' */
  uint8_T is_balance;                  /* '<Root>/state' */
  uint8_T is_charge;                   /* '<Root>/state' */
  uint8_T is_discharge;                /* '<Root>/state' */
  uint8_T is_storage;                  /* '<Root>/state' */
  boolean_T Voltage_MODE;              /* '<S3>/Voltage' */
  boolean_T Current_MODE;              /* '<S3>/Current ' */
} DW_control_T;

/* Continuous states (default storage) */
typedef struct {
  real_T AnalogFilterDesign_CSTATE[2]; /* '<Root>/Analog Filter Design' */
  real_T AnalogFilterDesign1_CSTATE[2];/* '<Root>/Analog Filter Design1' */
  real_T AnalogFilterDesign2_CSTATE[2];/* '<Root>/Analog Filter Design2' */
  real_T AnalogFilterDesign3_CSTATE[2];/* '<Root>/Analog Filter Design3' */
  real_T AnalogFilterDesign4_CSTATE[2];/* '<Root>/Analog Filter Design4' */
} X_control_T;

/* State derivatives (default storage) */
typedef struct {
  real_T AnalogFilterDesign_CSTATE[2]; /* '<Root>/Analog Filter Design' */
  real_T AnalogFilterDesign1_CSTATE[2];/* '<Root>/Analog Filter Design1' */
  real_T AnalogFilterDesign2_CSTATE[2];/* '<Root>/Analog Filter Design2' */
  real_T AnalogFilterDesign3_CSTATE[2];/* '<Root>/Analog Filter Design3' */
  real_T AnalogFilterDesign4_CSTATE[2];/* '<Root>/Analog Filter Design4' */
} XDot_control_T;

/* State disabled  */
typedef struct {
  boolean_T AnalogFilterDesign_CSTATE[2];/* '<Root>/Analog Filter Design' */
  boolean_T AnalogFilterDesign1_CSTATE[2];/* '<Root>/Analog Filter Design1' */
  boolean_T AnalogFilterDesign2_CSTATE[2];/* '<Root>/Analog Filter Design2' */
  boolean_T AnalogFilterDesign3_CSTATE[2];/* '<Root>/Analog Filter Design3' */
  boolean_T AnalogFilterDesign4_CSTATE[2];/* '<Root>/Analog Filter Design4' */
} XDis_control_T;

#ifndef ODE4_INTG
#define ODE4_INTG

/* ODE4 Integration Data */
typedef struct {
  real_T *y;                           /* output */
  real_T *f[4];                        /* derivatives */
} ODE4_IntgData;

#endif

/* External inputs (root inport signals with default storage) */
typedef struct {
  real_T sens_pwr_voltage;             /* '<Root>/sens_pwr_voltage' */
  real_T sens_bat_voltage;             /* '<Root>/sens_bat_voltage' */
  real_T sens_buck_in_voltage;         /* '<Root>/sens_buck_in_voltage' */
  real_T sens_buck_out_voltage;        /* '<Root>/sens_buck_out_voltage' */
  real_T sens_bat_current;             /* '<Root>/sens_bat_current' */
  real_T sens_temperature;             /* '<Root>/sens_temperature' */
  real_T sens_bat_sv[24];              /* '<Root>/sens_bat_sv' */
  uint32_T mode;                       /* '<Root>/mode' */
  int32_T bat_type;                    /* '<Root>/bat_type' */
  int32_T bat_num;                     /* '<Root>/bat_num' */
  int32_T run_state;                   /* '<Root>/run_state' */
  real32_T cmd_current;                /* '<Root>/cmd_current' */
  real32_T bat_capacity;               /* '<Root>/bat_capacity' */
} ExtU_control_T;

/* External outputs (root outports fed by signals with default storage) */
typedef struct {
  OutBus out;                          /* '<Root>/out' */
  real32_T cmd_all_voltage;            /* '<Root>/cmd_all_voltage' */
  real32_T cmd_all_current;            /* '<Root>/cmd_all_current' */
  real_T pwr_vol;                      /* '<Root>/pwr_vol' */
  real_T bat_vol;                      /* '<Root>/bat_vol' */
  real_T buck_in_vol;                  /* '<Root>/buck_in_vol' */
  real_T buck_out_vol;                 /* '<Root>/buck_out_vol' */
  real_T current;                      /* '<Root>/current' */
  real_T bat_sv[24];                   /* '<Root>/bat_sv' */
} ExtY_control_T;

/* Parameters (default storage) */
struct P_control_T_ {
  real32_T CurrentPID_InitialConditionForF;
                              /* Mask Parameter: CurrentPID_InitialConditionForF
                               * Referenced by: '<S36>/Filter'
                               */
  real32_T VoltagePID_InitialConditionForF;
                              /* Mask Parameter: VoltagePID_InitialConditionForF
                               * Referenced by: '<S90>/Filter'
                               */
  real32_T CurrentPID_InitialConditionForI;
                              /* Mask Parameter: CurrentPID_InitialConditionForI
                               * Referenced by: '<S41>/Integrator'
                               */
  real32_T VoltagePID_InitialConditionForI;
                              /* Mask Parameter: VoltagePID_InitialConditionForI
                               * Referenced by: '<S95>/Integrator'
                               */
  real32_T CurrentPID_N;               /* Mask Parameter: CurrentPID_N
                                        * Referenced by: '<S44>/Filter Coefficient'
                                        */
  real32_T VoltagePID_N;               /* Mask Parameter: VoltagePID_N
                                        * Referenced by: '<S98>/Filter Coefficient'
                                        */
  real_T Out1_Y0;                      /* Computed Parameter: Out1_Y0
                                        * Referenced by: '<S58>/Out1'
                                        */
  real_T Voltageout_Y0;                /* Computed Parameter: Voltageout_Y0
                                        * Referenced by: '<S6>/Voltage out'
                                        */
  real_T Constant_Value;               /* Expression: 0
                                        * Referenced by: '<S6>/Constant'
                                        */
  real_T Constant2_Value;              /* Expression: 3150
                                        * Referenced by: '<S6>/Constant2'
                                        */
  real_T Saturation_UpperSat;          /* Expression: 51000
                                        * Referenced by: '<S6>/Saturation'
                                        */
  real_T Saturation_LowerSat;          /* Expression: 3150
                                        * Referenced by: '<S6>/Saturation'
                                        */
  real_T uDLookupTable5_tableData[6];  /* Expression: [0:5]
                                        * Referenced by: '<Root>/1-D Lookup Table5'
                                        */
  real_T uDLookupTable5_bp01Data[6];   /* Expression: [0:5]
                                        * Referenced by: '<Root>/1-D Lookup Table5'
                                        */
  real_T AnalogFilterDesign_A_pr[3];
                                  /* Computed Parameter: AnalogFilterDesign_A_pr
                                   * Referenced by: '<Root>/Analog Filter Design'
                                   */
  real_T AnalogFilterDesign_B_pr; /* Computed Parameter: AnalogFilterDesign_B_pr
                                   * Referenced by: '<Root>/Analog Filter Design'
                                   */
  real_T AnalogFilterDesign_C_pr; /* Computed Parameter: AnalogFilterDesign_C_pr
                                   * Referenced by: '<Root>/Analog Filter Design'
                                   */
  real_T AnalogFilterDesign_InitialCondi;/* Expression: 0
                                          * Referenced by: '<Root>/Analog Filter Design'
                                          */
  real_T AnalogFilterDesign1_A_pr[3];
                                 /* Computed Parameter: AnalogFilterDesign1_A_pr
                                  * Referenced by: '<Root>/Analog Filter Design1'
                                  */
  real_T AnalogFilterDesign1_B_pr;
                                 /* Computed Parameter: AnalogFilterDesign1_B_pr
                                  * Referenced by: '<Root>/Analog Filter Design1'
                                  */
  real_T AnalogFilterDesign1_C_pr;
                                 /* Computed Parameter: AnalogFilterDesign1_C_pr
                                  * Referenced by: '<Root>/Analog Filter Design1'
                                  */
  real_T AnalogFilterDesign1_InitialCond;/* Expression: 0
                                          * Referenced by: '<Root>/Analog Filter Design1'
                                          */
  real_T AnalogFilterDesign2_A_pr[3];
                                 /* Computed Parameter: AnalogFilterDesign2_A_pr
                                  * Referenced by: '<Root>/Analog Filter Design2'
                                  */
  real_T AnalogFilterDesign2_B_pr;
                                 /* Computed Parameter: AnalogFilterDesign2_B_pr
                                  * Referenced by: '<Root>/Analog Filter Design2'
                                  */
  real_T AnalogFilterDesign2_C_pr;
                                 /* Computed Parameter: AnalogFilterDesign2_C_pr
                                  * Referenced by: '<Root>/Analog Filter Design2'
                                  */
  real_T AnalogFilterDesign2_InitialCond;/* Expression: 0
                                          * Referenced by: '<Root>/Analog Filter Design2'
                                          */
  real_T AnalogFilterDesign3_A_pr[3];
                                 /* Computed Parameter: AnalogFilterDesign3_A_pr
                                  * Referenced by: '<Root>/Analog Filter Design3'
                                  */
  real_T AnalogFilterDesign3_B_pr;
                                 /* Computed Parameter: AnalogFilterDesign3_B_pr
                                  * Referenced by: '<Root>/Analog Filter Design3'
                                  */
  real_T AnalogFilterDesign3_C_pr;
                                 /* Computed Parameter: AnalogFilterDesign3_C_pr
                                  * Referenced by: '<Root>/Analog Filter Design3'
                                  */
  real_T AnalogFilterDesign3_InitialCond;/* Expression: 0
                                          * Referenced by: '<Root>/Analog Filter Design3'
                                          */
  real_T AnalogFilterDesign4_A_pr[3];
                                 /* Computed Parameter: AnalogFilterDesign4_A_pr
                                  * Referenced by: '<Root>/Analog Filter Design4'
                                  */
  real_T AnalogFilterDesign4_B_pr;
                                 /* Computed Parameter: AnalogFilterDesign4_B_pr
                                  * Referenced by: '<Root>/Analog Filter Design4'
                                  */
  real_T AnalogFilterDesign4_C_pr;
                                 /* Computed Parameter: AnalogFilterDesign4_C_pr
                                  * Referenced by: '<Root>/Analog Filter Design4'
                                  */
  real_T AnalogFilterDesign4_InitialCond;/* Expression: 0
                                          * Referenced by: '<Root>/Analog Filter Design4'
                                          */
  real_T uDLookupTable_tableData[151]; /* Expression: [0:150]
                                        * Referenced by: '<Root>/1-D Lookup Table'
                                        */
  real_T uDLookupTable_bp01Data[151];  /* Expression: [0:150]
                                        * Referenced by: '<Root>/1-D Lookup Table'
                                        */
  real_T uDLookupTable1_tableData[151];/* Expression: [0:150]
                                        * Referenced by: '<Root>/1-D Lookup Table1'
                                        */
  real_T uDLookupTable1_bp01Data[151]; /* Expression: [0:150]
                                        * Referenced by: '<Root>/1-D Lookup Table1'
                                        */
  real_T uDLookupTable2_tableData[151];/* Expression: [0:150]
                                        * Referenced by: '<Root>/1-D Lookup Table2'
                                        */
  real_T uDLookupTable2_bp01Data[151]; /* Expression: [0:150]
                                        * Referenced by: '<Root>/1-D Lookup Table2'
                                        */
  real_T uDLookupTable3_tableData[151];/* Expression: [0:150]
                                        * Referenced by: '<Root>/1-D Lookup Table3'
                                        */
  real_T uDLookupTable3_bp01Data[151]; /* Expression: [0:150]
                                        * Referenced by: '<Root>/1-D Lookup Table3'
                                        */
  real_T uDLookupTable4_tableData[61]; /* Expression: [-30:30]
                                        * Referenced by: '<Root>/1-D Lookup Table4'
                                        */
  real_T uDLookupTable4_bp01Data[61];  /* Expression: [-30:30]
                                        * Referenced by: '<Root>/1-D Lookup Table4'
                                        */
  real32_T current_out_Y0;             /* Computed Parameter: current_out_Y0
                                        * Referenced by: '<S5>/current_out'
                                        */
  real32_T Filter_gainval;             /* Computed Parameter: Filter_gainval
                                        * Referenced by: '<S36>/Filter'
                                        */
  real32_T Integrator_gainval;         /* Computed Parameter: Integrator_gainval
                                        * Referenced by: '<S41>/Integrator'
                                        */
  real32_T Merge1_InitialOutput;     /* Computed Parameter: Merge1_InitialOutput
                                      * Referenced by: '<S6>/Merge1'
                                      */
  real32_T Integrator_gainval_b;     /* Computed Parameter: Integrator_gainval_b
                                      * Referenced by: '<S95>/Integrator'
                                      */
  real32_T Filter_gainval_h;           /* Computed Parameter: Filter_gainval_h
                                        * Referenced by: '<S90>/Filter'
                                        */
  uint32_T AnalogFilterDesign_A_ir[3];
                                  /* Computed Parameter: AnalogFilterDesign_A_ir
                                   * Referenced by: '<Root>/Analog Filter Design'
                                   */
  uint32_T AnalogFilterDesign_A_jc[3];
                                  /* Computed Parameter: AnalogFilterDesign_A_jc
                                   * Referenced by: '<Root>/Analog Filter Design'
                                   */
  uint32_T AnalogFilterDesign_B_ir;
                                  /* Computed Parameter: AnalogFilterDesign_B_ir
                                   * Referenced by: '<Root>/Analog Filter Design'
                                   */
  uint32_T AnalogFilterDesign_B_jc[2];
                                  /* Computed Parameter: AnalogFilterDesign_B_jc
                                   * Referenced by: '<Root>/Analog Filter Design'
                                   */
  uint32_T AnalogFilterDesign_C_ir;
                                  /* Computed Parameter: AnalogFilterDesign_C_ir
                                   * Referenced by: '<Root>/Analog Filter Design'
                                   */
  uint32_T AnalogFilterDesign_C_jc[3];
                                  /* Computed Parameter: AnalogFilterDesign_C_jc
                                   * Referenced by: '<Root>/Analog Filter Design'
                                   */
  uint32_T AnalogFilterDesign1_A_ir[3];
                                 /* Computed Parameter: AnalogFilterDesign1_A_ir
                                  * Referenced by: '<Root>/Analog Filter Design1'
                                  */
  uint32_T AnalogFilterDesign1_A_jc[3];
                                 /* Computed Parameter: AnalogFilterDesign1_A_jc
                                  * Referenced by: '<Root>/Analog Filter Design1'
                                  */
  uint32_T AnalogFilterDesign1_B_ir;
                                 /* Computed Parameter: AnalogFilterDesign1_B_ir
                                  * Referenced by: '<Root>/Analog Filter Design1'
                                  */
  uint32_T AnalogFilterDesign1_B_jc[2];
                                 /* Computed Parameter: AnalogFilterDesign1_B_jc
                                  * Referenced by: '<Root>/Analog Filter Design1'
                                  */
  uint32_T AnalogFilterDesign1_C_ir;
                                 /* Computed Parameter: AnalogFilterDesign1_C_ir
                                  * Referenced by: '<Root>/Analog Filter Design1'
                                  */
  uint32_T AnalogFilterDesign1_C_jc[3];
                                 /* Computed Parameter: AnalogFilterDesign1_C_jc
                                  * Referenced by: '<Root>/Analog Filter Design1'
                                  */
  uint32_T AnalogFilterDesign2_A_ir[3];
                                 /* Computed Parameter: AnalogFilterDesign2_A_ir
                                  * Referenced by: '<Root>/Analog Filter Design2'
                                  */
  uint32_T AnalogFilterDesign2_A_jc[3];
                                 /* Computed Parameter: AnalogFilterDesign2_A_jc
                                  * Referenced by: '<Root>/Analog Filter Design2'
                                  */
  uint32_T AnalogFilterDesign2_B_ir;
                                 /* Computed Parameter: AnalogFilterDesign2_B_ir
                                  * Referenced by: '<Root>/Analog Filter Design2'
                                  */
  uint32_T AnalogFilterDesign2_B_jc[2];
                                 /* Computed Parameter: AnalogFilterDesign2_B_jc
                                  * Referenced by: '<Root>/Analog Filter Design2'
                                  */
  uint32_T AnalogFilterDesign2_C_ir;
                                 /* Computed Parameter: AnalogFilterDesign2_C_ir
                                  * Referenced by: '<Root>/Analog Filter Design2'
                                  */
  uint32_T AnalogFilterDesign2_C_jc[3];
                                 /* Computed Parameter: AnalogFilterDesign2_C_jc
                                  * Referenced by: '<Root>/Analog Filter Design2'
                                  */
  uint32_T AnalogFilterDesign3_A_ir[3];
                                 /* Computed Parameter: AnalogFilterDesign3_A_ir
                                  * Referenced by: '<Root>/Analog Filter Design3'
                                  */
  uint32_T AnalogFilterDesign3_A_jc[3];
                                 /* Computed Parameter: AnalogFilterDesign3_A_jc
                                  * Referenced by: '<Root>/Analog Filter Design3'
                                  */
  uint32_T AnalogFilterDesign3_B_ir;
                                 /* Computed Parameter: AnalogFilterDesign3_B_ir
                                  * Referenced by: '<Root>/Analog Filter Design3'
                                  */
  uint32_T AnalogFilterDesign3_B_jc[2];
                                 /* Computed Parameter: AnalogFilterDesign3_B_jc
                                  * Referenced by: '<Root>/Analog Filter Design3'
                                  */
  uint32_T AnalogFilterDesign3_C_ir;
                                 /* Computed Parameter: AnalogFilterDesign3_C_ir
                                  * Referenced by: '<Root>/Analog Filter Design3'
                                  */
  uint32_T AnalogFilterDesign3_C_jc[3];
                                 /* Computed Parameter: AnalogFilterDesign3_C_jc
                                  * Referenced by: '<Root>/Analog Filter Design3'
                                  */
  uint32_T AnalogFilterDesign4_A_ir[3];
                                 /* Computed Parameter: AnalogFilterDesign4_A_ir
                                  * Referenced by: '<Root>/Analog Filter Design4'
                                  */
  uint32_T AnalogFilterDesign4_A_jc[3];
                                 /* Computed Parameter: AnalogFilterDesign4_A_jc
                                  * Referenced by: '<Root>/Analog Filter Design4'
                                  */
  uint32_T AnalogFilterDesign4_B_ir;
                                 /* Computed Parameter: AnalogFilterDesign4_B_ir
                                  * Referenced by: '<Root>/Analog Filter Design4'
                                  */
  uint32_T AnalogFilterDesign4_B_jc[2];
                                 /* Computed Parameter: AnalogFilterDesign4_B_jc
                                  * Referenced by: '<Root>/Analog Filter Design4'
                                  */
  uint32_T AnalogFilterDesign4_C_ir;
                                 /* Computed Parameter: AnalogFilterDesign4_C_ir
                                  * Referenced by: '<Root>/Analog Filter Design4'
                                  */
  uint32_T AnalogFilterDesign4_C_jc[3];
                                 /* Computed Parameter: AnalogFilterDesign4_C_jc
                                  * Referenced by: '<Root>/Analog Filter Design4'
                                  */
};

/* Real-time Model Data Structure */
struct tag_RTM_control_T {
  const char_T *errorStatus;
  RTWSolverInfo solverInfo;
  X_control_T *contStates;
  int_T *periodicContStateIndices;
  real_T *periodicContStateRanges;
  real_T *derivs;
  XDis_control_T *contStateDisabled;
  boolean_T zCCacheNeedsReset;
  boolean_T derivCacheNeedsReset;
  boolean_T CTOutputIncnstWithState;
  real_T odeY[10];
  real_T odeF[4][10];
  ODE4_IntgData intgData;

  /*
   * DataMapInfo:
   * The following substructure contains information regarding
   * structures generated in the model's C API.
   */
  struct {
    rtwCAPI_ModelMappingInfo mmi;
  } DataMapInfo;

  /*
   * Sizes:
   * The following substructure contains sizes information
   * for many of the model attributes such as inputs, outputs,
   * dwork, sample times, etc.
   */
  struct {
    int_T numContStates;
    int_T numPeriodicContStates;
    int_T numSampTimes;
  } Sizes;

  /*
   * Timing:
   * The following substructure contains information regarding
   * the timing information for the model.
   */
  struct {
    uint32_T clockTick0;
    time_T stepSize0;
    uint32_T clockTick1;
    time_T tStart;
    SimTimeStep simTimeStep;
    boolean_T stopRequestedFlag;
    time_T *t;
    time_T tArray[2];
  } Timing;
};

/* Block parameters (default storage) */
extern P_control_T control_P;

/* Block signals (default storage) */
extern B_control_T control_B;

/* Continuous states (default storage) */
extern X_control_T control_X;

/* Disabled states (default storage) */
extern XDis_control_T control_XDis;

/* Block states (default storage) */
extern DW_control_T control_DW;

/* External inputs (root inport signals with default storage) */
extern ExtU_control_T control_U;

/* External outputs (root outports fed by signals with default storage) */
extern ExtY_control_T control_Y;

/*
 * Exported Global Parameters
 *
 * Note: Exported global parameters are tunable parameters with an exported
 * global storage class designation.  Code generation will declare the memory for
 * these parameters and exports their symbols.
 *
 */
extern real_T NormalVol[9];            /* Variable: NormalVol
                                        * Referenced by: '<Root>/Constant'
                                        */
extern real32_T current_d;             /* Variable: current_d
                                        * Referenced by: '<S34>/Derivative Gain'
                                        */
extern real32_T current_i;             /* Variable: current_i
                                        * Referenced by: '<S38>/Integral Gain'
                                        */
extern real32_T current_p;             /* Variable: current_p
                                        * Referenced by: '<S46>/Proportional Gain'
                                        */
extern real32_T voltage_d;             /* Variable: voltage_d
                                        * Referenced by: '<S88>/Derivative Gain'
                                        */
extern real32_T voltage_i;             /* Variable: voltage_i
                                        * Referenced by: '<S92>/Integral Gain'
                                        */
extern real32_T voltage_p;             /* Variable: voltage_p
                                        * Referenced by: '<S100>/Proportional Gain'
                                        */

/* Model entry point functions */
extern void control_initialize(void);
extern void control_step(void);
extern void control_terminate(void);

/* Function to get C API Model Mapping Static Info */
extern const rtwCAPI_ModelMappingStaticInfo*
  control_GetCAPIStaticMap(void);

/* Real-time Model object */
extern RT_MODEL_control_T *const control_M;

/*-
 * The generated code includes comments that allow you to trace directly
 * back to the appropriate location in the model.  The basic format
 * is <system>/block_name, where system is the system number (uniquely
 * assigned by Simulink) and block_name is the name of the block.
 *
 * Use the MATLAB hilite_system command to trace the generated code back
 * to the model.  For example,
 *
 * hilite_system('<S3>')    - opens system 3
 * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
 *
 * Here is the system hierarchy for this model
 *
 * '<Root>' : 'control'
 * '<S1>'   : 'control/state'
 * '<S2>'   : 'control/temp_control'
 * '<S3>'   : 'control/voltage_control'
 * '<S4>'   : 'control/temp_control/Chart'
 * '<S5>'   : 'control/voltage_control/Current '
 * '<S6>'   : 'control/voltage_control/Voltage'
 * '<S7>'   : 'control/voltage_control/Current /Current PID'
 * '<S8>'   : 'control/voltage_control/Current /Current PID/Anti-windup'
 * '<S9>'   : 'control/voltage_control/Current /Current PID/D Gain'
 * '<S10>'  : 'control/voltage_control/Current /Current PID/External Derivative'
 * '<S11>'  : 'control/voltage_control/Current /Current PID/Filter'
 * '<S12>'  : 'control/voltage_control/Current /Current PID/Filter ICs'
 * '<S13>'  : 'control/voltage_control/Current /Current PID/I Gain'
 * '<S14>'  : 'control/voltage_control/Current /Current PID/Ideal P Gain'
 * '<S15>'  : 'control/voltage_control/Current /Current PID/Ideal P Gain Fdbk'
 * '<S16>'  : 'control/voltage_control/Current /Current PID/Integrator'
 * '<S17>'  : 'control/voltage_control/Current /Current PID/Integrator ICs'
 * '<S18>'  : 'control/voltage_control/Current /Current PID/N Copy'
 * '<S19>'  : 'control/voltage_control/Current /Current PID/N Gain'
 * '<S20>'  : 'control/voltage_control/Current /Current PID/P Copy'
 * '<S21>'  : 'control/voltage_control/Current /Current PID/Parallel P Gain'
 * '<S22>'  : 'control/voltage_control/Current /Current PID/Reset Signal'
 * '<S23>'  : 'control/voltage_control/Current /Current PID/Saturation'
 * '<S24>'  : 'control/voltage_control/Current /Current PID/Saturation Fdbk'
 * '<S25>'  : 'control/voltage_control/Current /Current PID/Sum'
 * '<S26>'  : 'control/voltage_control/Current /Current PID/Sum Fdbk'
 * '<S27>'  : 'control/voltage_control/Current /Current PID/Tracking Mode'
 * '<S28>'  : 'control/voltage_control/Current /Current PID/Tracking Mode Sum'
 * '<S29>'  : 'control/voltage_control/Current /Current PID/Tsamp - Integral'
 * '<S30>'  : 'control/voltage_control/Current /Current PID/Tsamp - Ngain'
 * '<S31>'  : 'control/voltage_control/Current /Current PID/postSat Signal'
 * '<S32>'  : 'control/voltage_control/Current /Current PID/preSat Signal'
 * '<S33>'  : 'control/voltage_control/Current /Current PID/Anti-windup/Passthrough'
 * '<S34>'  : 'control/voltage_control/Current /Current PID/D Gain/Internal Parameters'
 * '<S35>'  : 'control/voltage_control/Current /Current PID/External Derivative/Error'
 * '<S36>'  : 'control/voltage_control/Current /Current PID/Filter/Disc. Forward Euler Filter'
 * '<S37>'  : 'control/voltage_control/Current /Current PID/Filter ICs/Internal IC - Filter'
 * '<S38>'  : 'control/voltage_control/Current /Current PID/I Gain/Internal Parameters'
 * '<S39>'  : 'control/voltage_control/Current /Current PID/Ideal P Gain/Passthrough'
 * '<S40>'  : 'control/voltage_control/Current /Current PID/Ideal P Gain Fdbk/Disabled'
 * '<S41>'  : 'control/voltage_control/Current /Current PID/Integrator/Discrete'
 * '<S42>'  : 'control/voltage_control/Current /Current PID/Integrator ICs/Internal IC'
 * '<S43>'  : 'control/voltage_control/Current /Current PID/N Copy/Disabled'
 * '<S44>'  : 'control/voltage_control/Current /Current PID/N Gain/Internal Parameters'
 * '<S45>'  : 'control/voltage_control/Current /Current PID/P Copy/Disabled'
 * '<S46>'  : 'control/voltage_control/Current /Current PID/Parallel P Gain/Internal Parameters'
 * '<S47>'  : 'control/voltage_control/Current /Current PID/Reset Signal/Disabled'
 * '<S48>'  : 'control/voltage_control/Current /Current PID/Saturation/Passthrough'
 * '<S49>'  : 'control/voltage_control/Current /Current PID/Saturation Fdbk/Disabled'
 * '<S50>'  : 'control/voltage_control/Current /Current PID/Sum/Sum_PID'
 * '<S51>'  : 'control/voltage_control/Current /Current PID/Sum Fdbk/Disabled'
 * '<S52>'  : 'control/voltage_control/Current /Current PID/Tracking Mode/Disabled'
 * '<S53>'  : 'control/voltage_control/Current /Current PID/Tracking Mode Sum/Passthrough'
 * '<S54>'  : 'control/voltage_control/Current /Current PID/Tsamp - Integral/TsSignalSpecification'
 * '<S55>'  : 'control/voltage_control/Current /Current PID/Tsamp - Ngain/Passthrough'
 * '<S56>'  : 'control/voltage_control/Current /Current PID/postSat Signal/Forward_Path'
 * '<S57>'  : 'control/voltage_control/Current /Current PID/preSat Signal/Forward_Path'
 * '<S58>'  : 'control/voltage_control/Voltage/Switch Case Action Subsystem'
 * '<S59>'  : 'control/voltage_control/Voltage/Switch Case Action Subsystem1'
 * '<S60>'  : 'control/voltage_control/Voltage/Switch Case Action Subsystem2'
 * '<S61>'  : 'control/voltage_control/Voltage/Voltage PID'
 * '<S62>'  : 'control/voltage_control/Voltage/Voltage PID/Anti-windup'
 * '<S63>'  : 'control/voltage_control/Voltage/Voltage PID/D Gain'
 * '<S64>'  : 'control/voltage_control/Voltage/Voltage PID/External Derivative'
 * '<S65>'  : 'control/voltage_control/Voltage/Voltage PID/Filter'
 * '<S66>'  : 'control/voltage_control/Voltage/Voltage PID/Filter ICs'
 * '<S67>'  : 'control/voltage_control/Voltage/Voltage PID/I Gain'
 * '<S68>'  : 'control/voltage_control/Voltage/Voltage PID/Ideal P Gain'
 * '<S69>'  : 'control/voltage_control/Voltage/Voltage PID/Ideal P Gain Fdbk'
 * '<S70>'  : 'control/voltage_control/Voltage/Voltage PID/Integrator'
 * '<S71>'  : 'control/voltage_control/Voltage/Voltage PID/Integrator ICs'
 * '<S72>'  : 'control/voltage_control/Voltage/Voltage PID/N Copy'
 * '<S73>'  : 'control/voltage_control/Voltage/Voltage PID/N Gain'
 * '<S74>'  : 'control/voltage_control/Voltage/Voltage PID/P Copy'
 * '<S75>'  : 'control/voltage_control/Voltage/Voltage PID/Parallel P Gain'
 * '<S76>'  : 'control/voltage_control/Voltage/Voltage PID/Reset Signal'
 * '<S77>'  : 'control/voltage_control/Voltage/Voltage PID/Saturation'
 * '<S78>'  : 'control/voltage_control/Voltage/Voltage PID/Saturation Fdbk'
 * '<S79>'  : 'control/voltage_control/Voltage/Voltage PID/Sum'
 * '<S80>'  : 'control/voltage_control/Voltage/Voltage PID/Sum Fdbk'
 * '<S81>'  : 'control/voltage_control/Voltage/Voltage PID/Tracking Mode'
 * '<S82>'  : 'control/voltage_control/Voltage/Voltage PID/Tracking Mode Sum'
 * '<S83>'  : 'control/voltage_control/Voltage/Voltage PID/Tsamp - Integral'
 * '<S84>'  : 'control/voltage_control/Voltage/Voltage PID/Tsamp - Ngain'
 * '<S85>'  : 'control/voltage_control/Voltage/Voltage PID/postSat Signal'
 * '<S86>'  : 'control/voltage_control/Voltage/Voltage PID/preSat Signal'
 * '<S87>'  : 'control/voltage_control/Voltage/Voltage PID/Anti-windup/Passthrough'
 * '<S88>'  : 'control/voltage_control/Voltage/Voltage PID/D Gain/Internal Parameters'
 * '<S89>'  : 'control/voltage_control/Voltage/Voltage PID/External Derivative/Error'
 * '<S90>'  : 'control/voltage_control/Voltage/Voltage PID/Filter/Disc. Forward Euler Filter'
 * '<S91>'  : 'control/voltage_control/Voltage/Voltage PID/Filter ICs/Internal IC - Filter'
 * '<S92>'  : 'control/voltage_control/Voltage/Voltage PID/I Gain/Internal Parameters'
 * '<S93>'  : 'control/voltage_control/Voltage/Voltage PID/Ideal P Gain/Passthrough'
 * '<S94>'  : 'control/voltage_control/Voltage/Voltage PID/Ideal P Gain Fdbk/Disabled'
 * '<S95>'  : 'control/voltage_control/Voltage/Voltage PID/Integrator/Discrete'
 * '<S96>'  : 'control/voltage_control/Voltage/Voltage PID/Integrator ICs/Internal IC'
 * '<S97>'  : 'control/voltage_control/Voltage/Voltage PID/N Copy/Disabled'
 * '<S98>'  : 'control/voltage_control/Voltage/Voltage PID/N Gain/Internal Parameters'
 * '<S99>'  : 'control/voltage_control/Voltage/Voltage PID/P Copy/Disabled'
 * '<S100>' : 'control/voltage_control/Voltage/Voltage PID/Parallel P Gain/Internal Parameters'
 * '<S101>' : 'control/voltage_control/Voltage/Voltage PID/Reset Signal/Disabled'
 * '<S102>' : 'control/voltage_control/Voltage/Voltage PID/Saturation/Passthrough'
 * '<S103>' : 'control/voltage_control/Voltage/Voltage PID/Saturation Fdbk/Disabled'
 * '<S104>' : 'control/voltage_control/Voltage/Voltage PID/Sum/Sum_PID'
 * '<S105>' : 'control/voltage_control/Voltage/Voltage PID/Sum Fdbk/Disabled'
 * '<S106>' : 'control/voltage_control/Voltage/Voltage PID/Tracking Mode/Disabled'
 * '<S107>' : 'control/voltage_control/Voltage/Voltage PID/Tracking Mode Sum/Passthrough'
 * '<S108>' : 'control/voltage_control/Voltage/Voltage PID/Tsamp - Integral/TsSignalSpecification'
 * '<S109>' : 'control/voltage_control/Voltage/Voltage PID/Tsamp - Ngain/Passthrough'
 * '<S110>' : 'control/voltage_control/Voltage/Voltage PID/postSat Signal/Forward_Path'
 * '<S111>' : 'control/voltage_control/Voltage/Voltage PID/preSat Signal/Forward_Path'
 */
#endif                                 /* control_h_ */

/*
 * File trailer for generated code.
 *
 * [EOF]
 */