/*
 * File: control.c
 *
 * Code generated for Simulink model 'control'.
 *
 * Model version                  : 1.249
 * Simulink Coder version         : 24.1 (R2024a) 19-Nov-2023
 * C/C++ source code generated on : Wed Sep 17 15:56:46 2025
 *
 * Target selection: ert.tlc
 * Embedded hardware selection: ARM Compatible->ARM Cortex
 * Code generation objectives: Unspecified
 * Validation result: Not run
 */

#include "control.h"
#include "rtwtypes.h"
#include <math.h>
#include "control_private.h"
#include "rt_nonfinite.h"
#include "RunModeEnumType.h"
#include "RunstateEnumType.h"
#include "control_capi.h"

/* Named constants for Chart: '<Root>/state' */
#define control_IN_BalanceComplete     ((uint8_T)1U)
#define control_IN_BalanceMod_open     ((uint8_T)2U)
#define control_IN_BalanceMode         ((uint8_T)1U)
#define control_IN_BalanceMode_close   ((uint8_T)3U)
#define control_IN_CCMode              ((uint8_T)2U)
#define control_IN_CVMode              ((uint8_T)3U)
#define control_IN_DisCharge           ((uint8_T)1U)
#define control_IN_DischargeMode       ((uint8_T)2U)
#define control_IN_NO_ACTIVE_CHILD     ((uint8_T)0U)
#define control_IN_Stop                ((uint8_T)3U)
#define control_IN_StopDisCharge       ((uint8_T)2U)
#define control_IN_TCMode              ((uint8_T)4U)
#define control_IN_balance             ((uint8_T)1U)
#define control_IN_charge              ((uint8_T)2U)
#define control_IN_charge_o            ((uint8_T)4U)
#define control_IN_deinit              ((uint8_T)3U)
#define control_IN_discharge           ((uint8_T)4U)
#define control_IN_init                ((uint8_T)5U)
#define control_IN_preBalance          ((uint8_T)4U)
#define control_IN_preCCMode           ((uint8_T)5U)
#define control_IN_preDisCharge        ((uint8_T)3U)
#define control_IN_setting             ((uint8_T)5U)
#define control_IN_setting_e           ((uint8_T)6U)
#define control_IN_setting_ej          ((uint8_T)4U)
#define control_IN_stop                ((uint8_T)7U)
#define control_IN_storage             ((uint8_T)6U)
#define control_IN_waitBuckVol         ((uint8_T)8U)
#define control_IN_waitBuckup          ((uint8_T)9U)
#define control_IN_waitPwrVol          ((uint8_T)10U)

/* Named constants for Chart: '<S2>/Chart' */
#define control_IN_run                 ((uint8_T)1U)
#define control_IN_stop_l              ((uint8_T)2U)

/* Exported block parameters */
real_T NormalVol[9] = { 4.35, 4.2, 4.2, 3.65, 4.2, 1.93, 1.0, 1.0, 2.0 } ;/* Variable: NormalVol
                                                                      * Referenced by: '<Root>/Constant'
                                                                      */

real32_T current_d = 0.1F;             /* Variable: current_d
                                        * Referenced by: '<S34>/Derivative Gain'
                                        */
real32_T current_i = 0.5F;             /* Variable: current_i
                                        * Referenced by: '<S38>/Integral Gain'
                                        */
real32_T current_p = 1.0F;             /* Variable: current_p
                                        * Referenced by: '<S46>/Proportional Gain'
                                        */
real32_T voltage_d = 0.1F;             /* Variable: voltage_d
                                        * Referenced by: '<S88>/Derivative Gain'
                                        */
real32_T voltage_i = 0.5F;             /* Variable: voltage_i
                                        * Referenced by: '<S92>/Integral Gain'
                                        */
real32_T voltage_p = 5.0F;             /* Variable: voltage_p
                                        * Referenced by: '<S100>/Proportional Gain'
                                        */

/* Block signals (default storage) */
B_control_T control_B;

/* Continuous states */
X_control_T control_X;

/* Disabled State Vector */
XDis_control_T control_XDis;

/* Block states (default storage) */
DW_control_T control_DW;

/* External inputs (root inport signals with default storage) */
ExtU_control_T control_U;

/* External outputs (root outports fed by signals with default storage) */
ExtY_control_T control_Y;

/* Real-time model */
static RT_MODEL_control_T control_M_;
RT_MODEL_control_T *const control_M = &control_M_;

/* Forward declaration for local functions */
static real_T control_check_vol(real_T flag, real_T x);
static void control_balance(void);
static void control_waitBuckup(const real_T *AnalogFilterDesign1, const real_T
  *AnalogFilterDesign3);
static void control_charge(const real_T *AnalogFilterDesign, const real_T
  *AnalogFilterDesign1, const real_T *AnalogFilterDesign2, const real_T
  *AnalogFilterDesign3, const real_T *AnalogFilterDesign4);
real_T look1_binlxpw(real_T u0, const real_T bp0[], const real_T table[],
                     uint32_T maxIndex)
{
  real_T frac;
  real_T yL_0d0;
  uint32_T iLeft;

  /* Column-major Lookup 1-D
     Search method: 'binary'
     Use previous index: 'off'
     Interpolation method: 'Linear point-slope'
     Extrapolation method: 'Linear'
     Use last breakpoint for index at or above upper limit: 'off'
     Remove protection against out-of-range input in generated code: 'off'
   */
  /* Prelookup - Index and Fraction
     Index Search method: 'binary'
     Extrapolation method: 'Linear'
     Use previous index: 'off'
     Use last breakpoint for index at or above upper limit: 'off'
     Remove protection against out-of-range input in generated code: 'off'
   */
  if (u0 <= bp0[0U]) {
    iLeft = 0U;
    frac = (u0 - bp0[0U]) / (bp0[1U] - bp0[0U]);
  } else if (u0 < bp0[maxIndex]) {
    uint32_T bpIdx;
    uint32_T iRght;

    /* Binary Search */
    bpIdx = maxIndex >> 1U;
    iLeft = 0U;
    iRght = maxIndex;
    while (iRght - iLeft > 1U) {
      if (u0 < bp0[bpIdx]) {
        iRght = bpIdx;
      } else {
        iLeft = bpIdx;
      }

      bpIdx = (iRght + iLeft) >> 1U;
    }

    frac = (u0 - bp0[iLeft]) / (bp0[iLeft + 1U] - bp0[iLeft]);
  } else {
    iLeft = maxIndex - 1U;
    frac = (u0 - bp0[maxIndex - 1U]) / (bp0[maxIndex] - bp0[maxIndex - 1U]);
  }

  /* Column-major Interpolation 1-D
     Interpolation method: 'Linear point-slope'
     Use last breakpoint for index at or above upper limit: 'off'
     Overflow mode: 'portable wrapping'
   */
  yL_0d0 = table[iLeft];
  return (table[iLeft + 1U] - yL_0d0) * frac + yL_0d0;
}

/*
 * This function updates continuous states using the ODE4 fixed-step
 * solver algorithm
 */
static void rt_ertODEUpdateContinuousStates(RTWSolverInfo *si )
{
  time_T t = rtsiGetT(si);
  time_T tnew = rtsiGetSolverStopTime(si);
  time_T h = rtsiGetStepSize(si);
  real_T *x = rtsiGetContStates(si);
  ODE4_IntgData *id = (ODE4_IntgData *)rtsiGetSolverData(si);
  real_T *y = id->y;
  real_T *f0 = id->f[0];
  real_T *f1 = id->f[1];
  real_T *f2 = id->f[2];
  real_T *f3 = id->f[3];
  real_T temp;
  int_T i;
  int_T nXc = 10;
  rtsiSetSimTimeStep(si,MINOR_TIME_STEP);

  /* Save the state values at time t in y, we'll use x as ynew. */
  (void) memcpy(y, x,
                (uint_T)nXc*sizeof(real_T));

  /* Assumes that rtsiSetT and ModelOutputs are up-to-date */
  /* f0 = f(t,y) */
  rtsiSetdX(si, f0);
  control_derivatives();

  /* f1 = f(t + (h/2), y + (h/2)*f0) */
  temp = 0.5 * h;
  for (i = 0; i < nXc; i++) {
    x[i] = y[i] + (temp*f0[i]);
  }

  rtsiSetT(si, t + temp);
  rtsiSetdX(si, f1);
  control_step();
  control_derivatives();

  /* f2 = f(t + (h/2), y + (h/2)*f1) */
  for (i = 0; i < nXc; i++) {
    x[i] = y[i] + (temp*f1[i]);
  }

  rtsiSetdX(si, f2);
  control_step();
  control_derivatives();

  /* f3 = f(t + h, y + h*f2) */
  for (i = 0; i < nXc; i++) {
    x[i] = y[i] + (h*f2[i]);
  }

  rtsiSetT(si, tnew);
  rtsiSetdX(si, f3);
  control_step();
  control_derivatives();

  /* tnew = t + h
     ynew = y + (h/6)*(f0 + 2*f1 + 2*f2 + 2*f3) */
  temp = h / 6.0;
  for (i = 0; i < nXc; i++) {
    x[i] = y[i] + temp*(f0[i] + 2.0*f1[i] + 2.0*f2[i] + f3[i]);
  }

  rtsiSetSimTimeStep(si,MAJOR_TIME_STEP);
}

real_T rt_roundd_snf(real_T u)
{
  real_T y;
  if (fabs(u) < 4.503599627370496E+15) {
    if (u >= 0.5) {
      y = floor(u + 0.5);
    } else if (u > -0.5) {
      y = u * 0.0;
    } else {
      y = ceil(u - 0.5);
    }
  } else {
    y = u;
  }

  return y;
}

/* Function for Chart: '<Root>/state' */
static real_T control_check_vol(real_T flag, real_T x)
{
  real_T y;
  uint32_T bat_count;
  bat_count = 0U;
  y = 0.0;

  /* Inport generated from: '<Root>/bat_num' incorporates:
   *  Lookup_n-D: '<Root>/1-D Lookup Table5'
   *  Outport generated from: '<Root>/bat_sv'
   */
  while ((real_T)bat_count <= control_U.bat_num) {
    bat_count++;
    if (flag > 0.0) {
      /* Lookup_n-D: '<Root>/1-D Lookup Table5' incorporates:
       *  Outport generated from: '<Root>/bat_sv'
       */
      if (control_Y.bat_sv[(int32_T)bat_count - 1] > x) {
        y++;
      }
    } else if (flag < 0.0) {
      /* Lookup_n-D: '<Root>/1-D Lookup Table5' incorporates:
       *  Outport generated from: '<Root>/bat_sv'
       */
      if (control_Y.bat_sv[(int32_T)bat_count - 1] < x) {
        y++;
      }
    } else if (fabs(control_Y.bat_sv[(int32_T)bat_count - 1] - x) < 0.01) {
      y++;
    }
  }

  /* End of Inport generated from: '<Root>/bat_num' */
  return y;
}

/* Function for Chart: '<Root>/state' */
static void control_balance(void)
{
  /* Inport generated from: '<Root>/mode' incorporates:
   *  Inport generated from: '<Root>/run_state'
   */
  if (control_U.mode == (uint32_T)Init) {
    control_DW.is_balance = control_IN_NO_ACTIVE_CHILD;
    control_DW.temporalCounter_i1 = 0U;
    control_DW.is_c3_control = control_IN_deinit;
  } else {
    switch (control_DW.is_balance) {
     case control_IN_BalanceComplete:
      control_B.cmd_CV_mode = 3U;
      control_B.cmd_buck_in_relay = 0.0;
      control_B.cmd_buck_out_relay = 0.0;
      control_B.cmd_pwm_en = 0U;
      if (control_DW.temporalCounter_i1 >= 1000U) {
        control_DW.is_balance = control_IN_setting;

        /* Outport generated from: '<Root>/cmd_all_voltage' */
        control_Y.cmd_all_voltage = 0.0F;

        /* Outport generated from: '<Root>/cmd_all_current' */
        control_Y.cmd_all_current = 0.0F;
      } else if (control_U.mode != (uint32_T)Balance) {
        control_DW.is_balance = control_IN_setting;

        /* Outport generated from: '<Root>/cmd_all_voltage' */
        control_Y.cmd_all_voltage = 0.0F;

        /* Outport generated from: '<Root>/cmd_all_current' */
        control_Y.cmd_all_current = 0.0F;
      }
      break;

     case control_IN_BalanceMod_open:
      if (control_DW.temporalCounter_i1 >= 10U) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_balance = control_IN_BalanceMode_close;
      } else if (control_U.mode != (uint32_T)Balance) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_balance = control_IN_BalanceComplete;
        control_B.cmd_CV_mode = 3U;

        /* Outport generated from: '<Root>/cmd_all_current' */
        control_Y.cmd_all_current = 0.0F;

        /* Outport generated from: '<Root>/cmd_all_voltage' */
        control_Y.cmd_all_voltage = 0.0F;
        control_B.cmd_buck_in_relay = 0.0;
        control_B.cmd_buck_out_relay = 0.0;
        control_B.cmd_pwm_en = 0U;
      }
      break;

     case control_IN_BalanceMode_close:
      if (control_DW.temporalCounter_i1 >= 10U) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_balance = control_IN_BalanceMod_open;
      } else if ((control_check_vol(0.0, NormalVol[control_U.bat_type - 1]) !=
                  0.0) || ((control_U.mode != (uint32_T)Balance) ||
                           (control_U.run_state == Stop))) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_balance = control_IN_BalanceComplete;
        control_B.cmd_CV_mode = 3U;

        /* Outport generated from: '<Root>/cmd_all_current' */
        control_Y.cmd_all_current = 0.0F;

        /* Outport generated from: '<Root>/cmd_all_voltage' */
        control_Y.cmd_all_voltage = 0.0F;
        control_B.cmd_buck_in_relay = 0.0;
        control_B.cmd_buck_out_relay = 0.0;
        control_B.cmd_pwm_en = 0U;
      }
      break;

     case control_IN_preBalance:
      control_B.cmd_CV_mode = 3U;
      control_B.cmd_buck_in_relay = 0.0;
      control_B.cmd_buck_out_relay = 0.0;
      control_B.cmd_pwm_en = 0U;
      if (control_DW.temporalCounter_i1 >= 400U) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_balance = control_IN_BalanceMode_close;
      } else if ((control_U.mode != (uint32_T)Balance) || (control_U.run_state ==
                  Stop)) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_balance = control_IN_BalanceComplete;

        /* Outport generated from: '<Root>/cmd_all_current' */
        control_Y.cmd_all_current = 0.0F;

        /* Outport generated from: '<Root>/cmd_all_voltage' */
        control_Y.cmd_all_voltage = 0.0F;
      }
      break;

     default:
      /* case IN_setting: */
      control_B.cmd_pwm_en = 0U;
      control_B.cmd_buck_in_relay = 0.0;
      control_B.cmd_buck_out_relay = 0.0;

      /* Inport generated from: '<Root>/run_state' */
      if (control_U.run_state == Start) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_balance = control_IN_preBalance;
        control_B.cmd_CV_mode = 3U;

        /* Outport generated from: '<Root>/cmd_all_current' */
        control_Y.cmd_all_current = 0.0F;

        /* Outport generated from: '<Root>/cmd_all_voltage' */
        control_Y.cmd_all_voltage = 0.0F;
      } else if (control_U.mode != (uint32_T)Balance) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_balance = control_IN_BalanceComplete;
        control_B.cmd_CV_mode = 3U;

        /* Outport generated from: '<Root>/cmd_all_current' */
        control_Y.cmd_all_current = 0.0F;

        /* Outport generated from: '<Root>/cmd_all_voltage' */
        control_Y.cmd_all_voltage = 0.0F;
      }
      break;
    }
  }

  /* End of Inport generated from: '<Root>/mode' */
}

/* Function for Chart: '<Root>/state' */
static void control_waitBuckup(const real_T *AnalogFilterDesign1, const real_T
  *AnalogFilterDesign3)
{
  control_B.cmd_CV_mode = 0U;
  control_B.cmd_pwm_en = 1U;
  if ((*AnalogFilterDesign3 >= *AnalogFilterDesign1) &&
      (control_DW.temporalCounter_i1 >= 200U)) {
    control_DW.temporalCounter_i1 = 0U;
    control_DW.is_charge = control_IN_TCMode;
    control_B.cmd_buck_out_relay = 1.0;

    /* Outport generated from: '<Root>/cmd_all_current' incorporates:
     *  Inport generated from: '<Root>/bat_capacity'
     */
    control_Y.cmd_all_current = 0.1F * control_U.bat_capacity;
  } else if ((control_U.run_state == Stop) || (control_U.mode != (uint32_T)
              Charge)) {
    control_DW.temporalCounter_i1 = 0U;
    control_DW.is_charge = control_IN_stop;
    control_B.cmd_buck_in_relay = 0.0;
    control_B.cmd_buck_out_relay = 0.0;
    control_B.cmd_pwm_en = 0U;
  }
}

/* Function for Chart: '<Root>/state' */
static void control_charge(const real_T *AnalogFilterDesign, const real_T
  *AnalogFilterDesign1, const real_T *AnalogFilterDesign2, const real_T
  *AnalogFilterDesign3, const real_T *AnalogFilterDesign4)
{
  real_T tmp;
  boolean_T guard1;
  boolean_T out;

  /* Inport generated from: '<Root>/mode' incorporates:
   *  Inport generated from: '<Root>/run_state'
   */
  if (control_U.mode == (uint32_T)Init) {
    control_DW.is_charge = control_IN_NO_ACTIVE_CHILD;
    control_DW.temporalCounter_i1 = 0U;
    control_DW.is_c3_control = control_IN_deinit;
  } else {
    guard1 = false;
    switch (control_DW.is_charge) {
     case control_IN_BalanceMode:
      control_B.cmd_CV_mode = 3U;
      control_B.cmd_buck_in_relay = 0.0;
      control_B.cmd_buck_out_relay = 0.0;
      control_B.cmd_pwm_en = 0U;
      if ((control_U.run_state == Stop) || (control_U.mode != (uint32_T)Charge) ||
          (control_check_vol(0.0, NormalVol[control_U.bat_type - 1]) != 0.0) ||
          (control_DW.temporalCounter_i1 >= 2160000U)) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_charge = control_IN_stop;
        control_B.cmd_CV_mode = 0U;
      }
      break;

     case control_IN_CCMode:
      control_B.cmd_CV_mode = 1U;

      /* Constant: '<Root>/Constant' incorporates:
       *  Inport generated from: '<Root>/bat_type'
       */
      /* Inport generated from: '<Root>/run_state' */
      out = ((control_check_vol(1.0, NormalVol[control_U.bat_type - 1]) != 0.0) &&
             (control_DW.temporalCounter_i1 >= 400U));
      if (out) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_charge = control_IN_CVMode;
        control_B.cmd_CV_mode = 2U;

        /* Outport generated from: '<Root>/cmd_all_current' */
        control_Y.cmd_all_current = 0.0F;
      } else if ((control_U.run_state == Stop) || (control_DW.temporalCounter_i1
                  >= 2160000U) || (control_U.mode != (uint32_T)Charge)) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_charge = control_IN_stop;
        control_B.cmd_CV_mode = 0U;
        control_B.cmd_buck_in_relay = 0.0;
        control_B.cmd_buck_out_relay = 0.0;
        control_B.cmd_pwm_en = 0U;
      }
      break;

     case control_IN_CVMode:
      control_B.cmd_CV_mode = 2U;
      if (*AnalogFilterDesign4 < control_U.bat_capacity * 0.05F) {
        guard1 = true;
      } else if ((control_U.mode != (uint32_T)Charge) || (control_U.run_state ==
                  Stop)) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_charge = control_IN_stop;
        control_B.cmd_CV_mode = 0U;
        control_B.cmd_buck_in_relay = 0.0;
        control_B.cmd_buck_out_relay = 0.0;
        control_B.cmd_pwm_en = 0U;
      } else if (control_DW.temporalCounter_i1 >= 2160000U) {
        guard1 = true;
      }
      break;

     case control_IN_TCMode:
      control_B.cmd_buck_out_relay = 1.0;
      control_B.cmd_CV_mode = 0U;
      out = ((control_check_vol(-1.0, 3.0) != 0.0) &&
             (control_DW.temporalCounter_i1 >= 200U));
      if (out) {
        control_DW.is_charge = control_IN_preCCMode;
        control_B.cmd_CV_mode = 1U;

        /* Outport generated from: '<Root>/cmd_all_current' incorporates:
         *  Inport generated from: '<Root>/bat_capacity'
         */
        control_Y.cmd_all_current = 0.1F * control_U.bat_capacity;
      } else if ((control_U.run_state == Stop) || (control_DW.temporalCounter_i1
                  >= 2160000U) || (control_U.mode != (uint32_T)Charge)) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_charge = control_IN_stop;
        control_B.cmd_buck_in_relay = 0.0;
        control_B.cmd_buck_out_relay = 0.0;
        control_B.cmd_pwm_en = 0U;
      }
      break;

     case control_IN_preCCMode:
      control_B.cmd_CV_mode = 1U;

      /* Inport generated from: '<Root>/bat_capacity' incorporates:
       *  Inport generated from: '<Root>/cmd_current'
       *  Outport generated from: '<Root>/cmd_all_current'
       */
      if (((control_U.bat_capacity <= control_U.cmd_current) &&
           (control_Y.cmd_all_current >= control_U.bat_capacity)) ||
          ((control_U.bat_capacity > control_U.cmd_current) &&
           (control_Y.cmd_all_current >= control_U.cmd_current))) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_charge = control_IN_CCMode;
      } else {
        control_Y.cmd_all_current += 0.0001F * control_U.bat_capacity;
      }
      break;

     case control_IN_setting_e:
      control_B.cmd_pwm_en = 0U;
      control_B.cmd_buck_in_relay = 0.0;
      control_B.cmd_buck_out_relay = 0.0;

      /* Inport generated from: '<Root>/run_state' */
      if (control_U.run_state == Start) {
        /* Constant: '<Root>/Constant' incorporates:
         *  Inport generated from: '<Root>/bat_num'
         *  Inport generated from: '<Root>/bat_type'
         */
        tmp = rt_roundd_snf(NormalVol[control_U.bat_type - 1] * (real_T)
                            control_U.bat_num);
        if (tmp < 2.147483648E+9) {
          if (tmp >= -2.147483648E+9) {
            /* Outport generated from: '<Root>/cmd_all_voltage' */
            control_Y.cmd_all_voltage = (real32_T)tmp;
          } else {
            /* Outport generated from: '<Root>/cmd_all_voltage' */
            control_Y.cmd_all_voltage = -2.14748365E+9F;
          }
        } else {
          /* Outport generated from: '<Root>/cmd_all_voltage' */
          control_Y.cmd_all_voltage = 2.14748365E+9F;
        }

        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_charge = control_IN_waitPwrVol;
      }
      break;

     case control_IN_stop:
      control_B.cmd_CV_mode = 0U;
      control_B.cmd_buck_in_relay = 0.0;
      control_B.cmd_buck_out_relay = 0.0;
      control_B.cmd_pwm_en = 0U;
      if (control_U.mode != (uint32_T)Charge) {
        control_DW.is_charge = control_IN_setting_e;

        /* Outport generated from: '<Root>/cmd_all_voltage' */
        control_Y.cmd_all_voltage = 0.0F;

        /* Outport generated from: '<Root>/cmd_all_current' */
        control_Y.cmd_all_current = 0.0F;
      } else if (control_DW.temporalCounter_i1 >= 200U) {
        control_DW.is_charge = control_IN_setting_e;

        /* Outport generated from: '<Root>/cmd_all_voltage' */
        control_Y.cmd_all_voltage = 0.0F;

        /* Outport generated from: '<Root>/cmd_all_current' */
        control_Y.cmd_all_current = 0.0F;
      }
      break;

     case control_IN_waitBuckVol:
      control_B.cmd_buck_in_relay = 1.0;

      /* Outport generated from: '<Root>/cmd_all_voltage' incorporates:
       *  Inport generated from: '<Root>/run_state'
       */
      if ((*AnalogFilterDesign2 >= control_Y.cmd_all_voltage) &&
          (control_DW.temporalCounter_i1 >= 200U)) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_charge = control_IN_waitBuckup;
        control_B.cmd_CV_mode = 0U;
        control_B.cmd_pwm_en = 1U;
      } else if ((control_U.run_state == Stop) || (control_U.mode != (uint32_T)
                  Charge)) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_charge = control_IN_stop;
        control_B.cmd_CV_mode = 0U;
        control_B.cmd_buck_in_relay = 0.0;
        control_B.cmd_buck_out_relay = 0.0;
        control_B.cmd_pwm_en = 0U;
      }
      break;

     case control_IN_waitBuckup:
      control_waitBuckup(AnalogFilterDesign1, AnalogFilterDesign3);
      break;

     default:
      /* case IN_waitPwrVol: */
      control_B.cmd_pwm_en = 0U;

      /* Outport generated from: '<Root>/cmd_all_voltage' incorporates:
       *  Inport generated from: '<Root>/run_state'
       */
      if ((*AnalogFilterDesign >= control_Y.cmd_all_voltage) &&
          (control_DW.temporalCounter_i1 >= 200U)) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_charge = control_IN_waitBuckVol;
        control_B.cmd_buck_in_relay = 1.0;
      } else if ((control_U.run_state == Stop) || (control_U.mode != (uint32_T)
                  Charge)) {
        control_DW.temporalCounter_i1 = 0U;
        control_DW.is_charge = control_IN_stop;
        control_B.cmd_CV_mode = 0U;
        control_B.cmd_buck_in_relay = 0.0;
        control_B.cmd_buck_out_relay = 0.0;
      }
      break;
    }

    if (guard1) {
      control_DW.temporalCounter_i1 = 0U;
      control_DW.is_charge = control_IN_BalanceMode;
      control_B.cmd_CV_mode = 3U;

      /* Outport generated from: '<Root>/cmd_all_current' */
      control_Y.cmd_all_current = 0.0F;
      control_B.cmd_buck_in_relay = 0.0;
      control_B.cmd_buck_out_relay = 0.0;
      control_B.cmd_pwm_en = 0U;
    }
  }

  /* End of Inport generated from: '<Root>/mode' */
}

/* Model step function */
void control_step(void)
{
  /* local block i/o variables */
  real32_T rtb_FilterCoefficient;
  real32_T rtb_IntegralGain;
  real32_T rtb_FilterCoefficient_o;
  real32_T rtb_IntegralGain_l;
  real_T tmp;
  int32_T rtb_pwm;
  real32_T Sum5;
  uint32_T ri;
  uint16_T rtb_fan;
  if (rtmIsMajorTimeStep(control_M)) {
    /* set solver stop time */
    rtsiSetSolverStopTime(&control_M->solverInfo,((control_M->Timing.clockTick0+
      1)*control_M->Timing.stepSize0));
  }                                    /* end MajorTimeStep */

  /* Update absolute time of base rate at minor time step */
  if (rtmIsMinorTimeStep(control_M)) {
    control_M->Timing.t[0] = rtsiGetT(&control_M->solverInfo);
  }

  if (rtmIsMajorTimeStep(control_M)) {
    /* Lookup_n-D: '<Root>/1-D Lookup Table5' incorporates:
     *  Inport generated from: '<Root>/In Bus Element6'
     *  Outport generated from: '<Root>/bat_sv'
     */
    for (rtb_pwm = 0; rtb_pwm < 24; rtb_pwm++) {
      control_Y.bat_sv[rtb_pwm] = look1_binlxpw(control_U.sens_bat_sv[rtb_pwm],
        control_P.uDLookupTable5_bp01Data, control_P.uDLookupTable5_tableData,
        5U);
    }

    /* End of Lookup_n-D: '<Root>/1-D Lookup Table5' */
  }

  /* StateSpace: '<Root>/Analog Filter Design' */
  control_Y.pwr_vol = 0.0;

  /* StateSpace: '<Root>/Analog Filter Design1' */
  control_Y.bat_vol = 0.0;

  /* StateSpace: '<Root>/Analog Filter Design2' */
  control_Y.buck_in_vol = 0.0;

  /* StateSpace: '<Root>/Analog Filter Design3' */
  control_Y.buck_out_vol = 0.0;

  /* StateSpace: '<Root>/Analog Filter Design4' */
  control_Y.current = 0.0;

  /* StateSpace: '<Root>/Analog Filter Design' */
  for (ri = control_P.AnalogFilterDesign_C_jc[0U]; ri <
       control_P.AnalogFilterDesign_C_jc[1U]; ri++) {
    /* StateSpace: '<Root>/Analog Filter Design' */
    control_Y.pwr_vol += control_P.AnalogFilterDesign_C_pr *
      control_X.AnalogFilterDesign_CSTATE[0U];
  }

  /* StateSpace: '<Root>/Analog Filter Design1' */
  for (ri = control_P.AnalogFilterDesign1_C_jc[0U]; ri <
       control_P.AnalogFilterDesign1_C_jc[1U]; ri++) {
    /* StateSpace: '<Root>/Analog Filter Design1' */
    control_Y.bat_vol += control_P.AnalogFilterDesign1_C_pr *
      control_X.AnalogFilterDesign1_CSTATE[0U];
  }

  /* StateSpace: '<Root>/Analog Filter Design2' */
  for (ri = control_P.AnalogFilterDesign2_C_jc[0U]; ri <
       control_P.AnalogFilterDesign2_C_jc[1U]; ri++) {
    /* StateSpace: '<Root>/Analog Filter Design2' */
    control_Y.buck_in_vol += control_P.AnalogFilterDesign2_C_pr *
      control_X.AnalogFilterDesign2_CSTATE[0U];
  }

  /* StateSpace: '<Root>/Analog Filter Design3' */
  for (ri = control_P.AnalogFilterDesign3_C_jc[0U]; ri <
       control_P.AnalogFilterDesign3_C_jc[1U]; ri++) {
    /* StateSpace: '<Root>/Analog Filter Design3' */
    control_Y.buck_out_vol += control_P.AnalogFilterDesign3_C_pr *
      control_X.AnalogFilterDesign3_CSTATE[0U];
  }

  /* StateSpace: '<Root>/Analog Filter Design4' */
  for (ri = control_P.AnalogFilterDesign4_C_jc[0U]; ri <
       control_P.AnalogFilterDesign4_C_jc[1U]; ri++) {
    /* StateSpace: '<Root>/Analog Filter Design4' */
    control_Y.current += control_P.AnalogFilterDesign4_C_pr *
      control_X.AnalogFilterDesign4_CSTATE[0U];
  }

  /* StateSpace: '<Root>/Analog Filter Design' */
  for (ri = control_P.AnalogFilterDesign_C_jc[1U]; ri <
       control_P.AnalogFilterDesign_C_jc[2U]; ri++) {
    /* StateSpace: '<Root>/Analog Filter Design' */
    control_Y.pwr_vol += control_P.AnalogFilterDesign_C_pr *
      control_X.AnalogFilterDesign_CSTATE[1U];
  }

  /* StateSpace: '<Root>/Analog Filter Design1' */
  for (ri = control_P.AnalogFilterDesign1_C_jc[1U]; ri <
       control_P.AnalogFilterDesign1_C_jc[2U]; ri++) {
    /* StateSpace: '<Root>/Analog Filter Design1' */
    control_Y.bat_vol += control_P.AnalogFilterDesign1_C_pr *
      control_X.AnalogFilterDesign1_CSTATE[1U];
  }

  /* StateSpace: '<Root>/Analog Filter Design2' */
  for (ri = control_P.AnalogFilterDesign2_C_jc[1U]; ri <
       control_P.AnalogFilterDesign2_C_jc[2U]; ri++) {
    /* StateSpace: '<Root>/Analog Filter Design2' */
    control_Y.buck_in_vol += control_P.AnalogFilterDesign2_C_pr *
      control_X.AnalogFilterDesign2_CSTATE[1U];
  }

  /* StateSpace: '<Root>/Analog Filter Design3' */
  for (ri = control_P.AnalogFilterDesign3_C_jc[1U]; ri <
       control_P.AnalogFilterDesign3_C_jc[2U]; ri++) {
    /* StateSpace: '<Root>/Analog Filter Design3' */
    control_Y.buck_out_vol += control_P.AnalogFilterDesign3_C_pr *
      control_X.AnalogFilterDesign3_CSTATE[1U];
  }

  /* StateSpace: '<Root>/Analog Filter Design4' */
  for (ri = control_P.AnalogFilterDesign4_C_jc[1U]; ri <
       control_P.AnalogFilterDesign4_C_jc[2U]; ri++) {
    /* StateSpace: '<Root>/Analog Filter Design4' */
    control_Y.current += control_P.AnalogFilterDesign4_C_pr *
      control_X.AnalogFilterDesign4_CSTATE[1U];
  }

  /* Outputs for Enabled SubSystem: '<S3>/Voltage' incorporates:
   *  EnablePort: '<S6>/Enable'
   */
  /* Outputs for Enabled SubSystem: '<S3>/Current ' incorporates:
   *  EnablePort: '<S5>/Enable'
   */
  if (rtmIsMajorTimeStep(control_M)) {
    /* Chart: '<Root>/state' incorporates:
     *  Constant: '<Root>/Constant'
     *  Inport generated from: '<Root>/bat_num'
     *  Inport generated from: '<Root>/bat_type'
     *  Inport generated from: '<Root>/cmd_current'
     *  Inport generated from: '<Root>/mode'
     *  Inport generated from: '<Root>/run_state'
     *  Outport generated from: '<Root>/cmd_all_current'
     */
    if (control_DW.temporalCounter_i1 < MAX_uint32_T) {
      control_DW.temporalCounter_i1++;
    }

    if (control_DW.is_active_c3_control == 0U) {
      control_DW.is_active_c3_control = 1U;
      control_DW.is_c3_control = control_IN_init;

      /* Outport generated from: '<Root>/cmd_all_voltage' */
      control_Y.cmd_all_voltage = 0.0F;

      /* Outport generated from: '<Root>/cmd_all_current' */
      control_Y.cmd_all_current = 0.0F;
      control_B.cmd_temp = 20.0;
      control_B.cmd_buck_in_relay = 0.0;
      control_B.cmd_buck_out_relay = 0.0;
      control_B.cmd_pwm_en = 0U;
    } else {
      switch (control_DW.is_c3_control) {
       case control_IN_balance:
        control_balance();
        break;

       case control_IN_charge:
        control_charge(&control_Y.pwr_vol, &control_Y.bat_vol,
                       &control_Y.buck_in_vol, &control_Y.buck_out_vol,
                       &control_Y.current);
        break;

       case control_IN_deinit:
        if (control_DW.temporalCounter_i1 >= 200U) {
          control_DW.is_c3_control = control_IN_init;

          /* Outport generated from: '<Root>/cmd_all_voltage' */
          control_Y.cmd_all_voltage = 0.0F;

          /* Outport generated from: '<Root>/cmd_all_current' */
          control_Y.cmd_all_current = 0.0F;
          control_B.cmd_temp = 20.0;
          control_B.cmd_buck_in_relay = 0.0;
          control_B.cmd_buck_out_relay = 0.0;
          control_B.cmd_pwm_en = 0U;
        }
        break;

       case control_IN_discharge:
        if (control_U.mode == (uint32_T)Init) {
          control_DW.is_discharge = control_IN_NO_ACTIVE_CHILD;
          control_DW.temporalCounter_i1 = 0U;
          control_DW.is_c3_control = control_IN_deinit;
        } else {
          switch (control_DW.is_discharge) {
           case control_IN_DisCharge:
            if ((control_Y.bat_vol <= 0.0) || (control_DW.temporalCounter_i1 >=
                 2160000U) || (control_U.run_state == Stop) || (control_U.mode
                 != (uint32_T)Discharge)) {
              control_DW.temporalCounter_i1 = 0U;
              control_DW.is_discharge = control_IN_StopDisCharge;
            }
            break;

           case control_IN_StopDisCharge:
            if (control_U.mode != (uint32_T)Discharge) {
              control_DW.is_discharge = control_IN_setting_ej;
              control_B.cmd_pwm_en = 0U;
              control_B.cmd_buck_in_relay = 0.0;
              control_B.cmd_buck_out_relay = 0.0;

              /* Outport generated from: '<Root>/cmd_all_voltage' */
              control_Y.cmd_all_voltage = 0.0F;

              /* Outport generated from: '<Root>/cmd_all_current' */
              control_Y.cmd_all_current = 0.0F;
            } else if (control_DW.temporalCounter_i1 >= 400U) {
              control_DW.is_discharge = control_IN_setting_ej;
              control_B.cmd_pwm_en = 0U;
              control_B.cmd_buck_in_relay = 0.0;
              control_B.cmd_buck_out_relay = 0.0;

              /* Outport generated from: '<Root>/cmd_all_voltage' */
              control_Y.cmd_all_voltage = 0.0F;

              /* Outport generated from: '<Root>/cmd_all_current' */
              control_Y.cmd_all_current = 0.0F;
            }
            break;

           case control_IN_preDisCharge:
            if (fabsf(control_Y.cmd_all_current) <= fabsf(control_U.cmd_current))
            {
              control_DW.temporalCounter_i1 = 0U;
              control_DW.is_discharge = control_IN_DisCharge;
            } else if ((control_U.run_state == Stop) || (control_U.mode !=
                        (uint32_T)Discharge)) {
              control_DW.temporalCounter_i1 = 0U;
              control_DW.is_discharge = control_IN_StopDisCharge;
            } else {
              control_Y.cmd_all_current -= 0.005F * control_U.cmd_current;
            }
            break;

           default:
            /* case IN_setting: */
            control_B.cmd_pwm_en = 0U;
            control_B.cmd_buck_in_relay = 0.0;
            control_B.cmd_buck_out_relay = 0.0;
            if (control_U.run_state == Start) {
              tmp = rt_roundd_snf(NormalVol[control_U.bat_type - 1] * (real_T)
                                  control_U.bat_num);
              if (tmp < 2.147483648E+9) {
                if (tmp >= -2.147483648E+9) {
                  /* Outport generated from: '<Root>/cmd_all_voltage' */
                  control_Y.cmd_all_voltage = (real32_T)tmp;
                } else {
                  /* Outport generated from: '<Root>/cmd_all_voltage' */
                  control_Y.cmd_all_voltage = -2.14748365E+9F;
                }
              } else {
                /* Outport generated from: '<Root>/cmd_all_voltage' */
                control_Y.cmd_all_voltage = 2.14748365E+9F;
              }

              if (control_Y.bat_vol <= 0.0) {
                control_DW.temporalCounter_i1 = 0U;
                control_DW.is_discharge = control_IN_StopDisCharge;
              } else if (control_Y.bat_vol > 0.0) {
                control_DW.is_discharge = control_IN_preDisCharge;

                /* Outport generated from: '<Root>/cmd_all_current' */
                control_Y.cmd_all_current = 0.0F;
              }
            }
            break;
          }
        }
        break;

       case control_IN_init:
        control_B.cmd_temp = 20.0;
        control_B.cmd_buck_in_relay = 0.0;
        control_B.cmd_buck_out_relay = 0.0;
        control_B.cmd_pwm_en = 0U;
        if (control_U.mode == (uint32_T)Discharge) {
          control_DW.is_c3_control = control_IN_discharge;
          control_DW.is_discharge = control_IN_setting_ej;

          /* Outport generated from: '<Root>/cmd_all_voltage' */
          control_Y.cmd_all_voltage = 0.0F;

          /* Outport generated from: '<Root>/cmd_all_current' */
          control_Y.cmd_all_current = 0.0F;
        } else if (control_U.mode == (uint32_T)Storage) {
          control_DW.is_c3_control = control_IN_storage;
          control_DW.is_storage = control_IN_setting;

          /* Outport generated from: '<Root>/cmd_all_voltage' */
          control_Y.cmd_all_voltage = 0.0F;

          /* Outport generated from: '<Root>/cmd_all_current' */
          control_Y.cmd_all_current = 0.0F;
        } else if (control_U.mode == (uint32_T)Charge) {
          control_DW.is_c3_control = control_IN_charge;
          control_DW.is_charge = control_IN_setting_e;

          /* Outport generated from: '<Root>/cmd_all_voltage' */
          control_Y.cmd_all_voltage = 0.0F;

          /* Outport generated from: '<Root>/cmd_all_current' */
          control_Y.cmd_all_current = 0.0F;
        } else if (control_U.mode == (uint32_T)Balance) {
          control_DW.is_c3_control = control_IN_balance;
          control_DW.is_balance = control_IN_setting;

          /* Outport generated from: '<Root>/cmd_all_voltage' */
          control_Y.cmd_all_voltage = 0.0F;

          /* Outport generated from: '<Root>/cmd_all_current' */
          control_Y.cmd_all_current = 0.0F;
        }
        break;

       default:
        /* case IN_storage: */
        if (control_U.mode == (uint32_T)Init) {
          control_DW.is_storage = control_IN_NO_ACTIVE_CHILD;
          control_DW.temporalCounter_i1 = 0U;
          control_DW.is_c3_control = control_IN_deinit;
        } else {
          switch (control_DW.is_storage) {
           case control_IN_BalanceMode:
            control_B.cmd_CV_mode = 3U;
            if ((control_U.mode != (uint32_T)Storage) ||
                (control_DW.temporalCounter_i1 >= 20000U)) {
              control_DW.is_storage = control_IN_Stop;
            }
            break;

           case control_IN_DischargeMode:
            control_B.cmd_CV_mode = 4U;
            if (control_DW.temporalCounter_i1 >= 20000U) {
              control_DW.temporalCounter_i1 = 0U;
              control_DW.is_storage = control_IN_BalanceMode;
              control_B.cmd_CV_mode = 3U;
            } else if (control_U.mode != (uint32_T)Storage) {
              control_DW.is_storage = control_IN_Stop;
            }
            break;

           case control_IN_Stop:
            control_DW.is_storage = control_IN_setting;
            control_B.cmd_pwm_en = 0U;
            control_B.cmd_buck_in_relay = 0.0;
            control_B.cmd_buck_out_relay = 0.0;

            /* Outport generated from: '<Root>/cmd_all_voltage' */
            control_Y.cmd_all_voltage = 0.0F;

            /* Outport generated from: '<Root>/cmd_all_current' */
            control_Y.cmd_all_current = 0.0F;
            break;

           case control_IN_charge_o:
            if (control_DW.temporalCounter_i1 >= 20000U) {
              control_DW.temporalCounter_i1 = 0U;
              control_DW.is_storage = control_IN_BalanceMode;
              control_B.cmd_CV_mode = 3U;
            }
            break;

           default:
            /* case IN_setting: */
            control_B.cmd_pwm_en = 0U;
            control_B.cmd_buck_in_relay = 0.0;
            control_B.cmd_buck_out_relay = 0.0;
            if (control_U.run_state == Start) {
              tmp = rt_roundd_snf(NormalVol[control_U.bat_type - 1] * (real_T)
                                  control_U.bat_num);
              if (tmp < 2.147483648E+9) {
                if (tmp >= -2.147483648E+9) {
                  /* Outport generated from: '<Root>/cmd_all_voltage' */
                  control_Y.cmd_all_voltage = (real32_T)tmp;
                } else {
                  /* Outport generated from: '<Root>/cmd_all_voltage' */
                  control_Y.cmd_all_voltage = -2.14748365E+9F;
                }
              } else {
                /* Outport generated from: '<Root>/cmd_all_voltage' */
                control_Y.cmd_all_voltage = 2.14748365E+9F;
              }

              if (control_Y.bat_vol <= 0.0) {
                control_DW.temporalCounter_i1 = 0U;
                control_DW.is_storage = control_IN_charge_o;
              } else if (control_Y.bat_vol > 0.0) {
                control_DW.temporalCounter_i1 = 0U;
                control_DW.is_storage = control_IN_DischargeMode;
                control_B.cmd_CV_mode = 4U;
              }
            }
            break;
          }
        }
        break;
      }
    }

    /* End of Chart: '<Root>/state' */

    /* Chart: '<S2>/Chart' incorporates:
     *  Inport generated from: '<Root>/In Bus Element5'
     */
    if (control_DW.temporalCounter_i1_c < 1023U) {
      control_DW.temporalCounter_i1_c++;
    }

    if (control_DW.is_active_c1_control == 0U) {
      control_DW.is_active_c1_control = 1U;
      control_DW.temporalCounter_i1_c = 0U;
      control_DW.is_c1_control = control_IN_stop_l;
      rtb_pwm = 0;
    } else if (control_DW.is_c1_control == control_IN_run) {
      if ((control_B.cmd_temp - control_U.sens_temperature >= 0.0) &&
          (control_DW.temporalCounter_i1_c >= 1000U)) {
        control_DW.temporalCounter_i1_c = 0U;
        control_DW.is_c1_control = control_IN_stop_l;
        rtb_pwm = 0;
      } else {
        rtb_pwm = 1;
      }

      /* case IN_stop: */
    } else if ((control_B.cmd_temp - control_U.sens_temperature < 0.0) &&
               (control_DW.temporalCounter_i1_c >= 1000U)) {
      control_DW.temporalCounter_i1_c = 0U;
      control_DW.is_c1_control = control_IN_run;
      rtb_pwm = 1;
    } else {
      rtb_pwm = 0;
    }

    /* End of Chart: '<S2>/Chart' */

    /* DataTypeConversion: '<Root>/Data Type Conversion1' */
    rtb_fan = (uint16_T)rtb_pwm;
    if (rtsiIsModeUpdateTimeStep(&control_M->solverInfo)) {
      if (control_B.cmd_pwm_en > 0U) {
        if (!control_DW.Current_MODE) {
          /* InitializeConditions for DiscreteIntegrator: '<S36>/Filter' */
          control_DW.Filter_DSTATE_i = control_P.CurrentPID_InitialConditionForF;

          /* InitializeConditions for DiscreteIntegrator: '<S41>/Integrator' */
          control_DW.Integrator_DSTATE_f =
            control_P.CurrentPID_InitialConditionForI;
          control_DW.Current_MODE = true;
        }
      } else {
        control_DW.Current_MODE = false;
      }
    }

    if (rtsiIsModeUpdateTimeStep(&control_M->solverInfo)) {
      if (control_B.cmd_pwm_en > 0U) {
        if (!control_DW.Voltage_MODE) {
          /* InitializeConditions for DiscreteIntegrator: '<S95>/Integrator' */
          control_DW.Integrator_DSTATE =
            control_P.VoltagePID_InitialConditionForI;

          /* InitializeConditions for DiscreteIntegrator: '<S90>/Filter' */
          control_DW.Filter_DSTATE = control_P.VoltagePID_InitialConditionForF;
          control_DW.Voltage_MODE = true;
        }
      } else {
        control_DW.Voltage_MODE = false;
      }
    }
  }

  /* End of Outputs for SubSystem: '<S3>/Voltage' */
  if (control_DW.Current_MODE) {
    /* Sum: '<S5>/Sum5' incorporates:
     *  DataTypeConversion: '<Root>/Data Type Conversion4'
     *  Outport generated from: '<Root>/cmd_all_current'
     */
    Sum5 = control_Y.cmd_all_current - (real32_T)control_Y.current;
    if (rtmIsMajorTimeStep(control_M)) {
      /* Gain: '<S44>/Filter Coefficient' incorporates:
       *  DiscreteIntegrator: '<S36>/Filter'
       *  Gain: '<S34>/Derivative Gain'
       *  Sum: '<S36>/SumD'
       */
      rtb_FilterCoefficient_o = (current_d * Sum5 - control_DW.Filter_DSTATE_i) *
        control_P.CurrentPID_N;

      /* Sum: '<S50>/Sum' incorporates:
       *  DiscreteIntegrator: '<S41>/Integrator'
       *  Gain: '<S46>/Proportional Gain'
       */
      control_B.Sum = (current_p * Sum5 + control_DW.Integrator_DSTATE_f) +
        rtb_FilterCoefficient_o;

      /* Gain: '<S38>/Integral Gain' */
      rtb_IntegralGain_l = current_i * Sum5;
    }
  }

  /* End of Outputs for SubSystem: '<S3>/Current ' */

  /* Outputs for Enabled SubSystem: '<S3>/Voltage' incorporates:
   *  EnablePort: '<S6>/Enable'
   */
  if (control_DW.Voltage_MODE) {
    if (rtmIsMajorTimeStep(control_M)) {
      /* SwitchCase: '<S6>/Switch Case' */
      if (rtsiIsModeUpdateTimeStep(&control_M->solverInfo)) {
        switch ((int32_T)control_B.cmd_CV_mode) {
         case 0:
         case 1:
          /* Outputs for IfAction SubSystem: '<S6>/Switch Case Action Subsystem2' incorporates:
           *  ActionPort: '<S60>/Action Port'
           */
          /* Merge: '<S6>/Merge1' incorporates:
           *  SignalConversion generated from: '<S60>/current_out'
           */
          control_B.Merge1 = control_B.Sum;

          /* End of Outputs for SubSystem: '<S6>/Switch Case Action Subsystem2' */
          break;

         case 2:
          /* Outputs for IfAction SubSystem: '<S6>/Switch Case Action Subsystem1' incorporates:
           *  ActionPort: '<S59>/Action Port'
           */
          /* Merge: '<S6>/Merge1' incorporates:
           *  Outport generated from: '<Root>/cmd_all_voltage'
           *  SignalConversion generated from: '<S59>/cmd_voltage'
           */
          control_B.Merge1 = control_Y.cmd_all_voltage;

          /* End of Outputs for SubSystem: '<S6>/Switch Case Action Subsystem1' */
          break;

         case 3:
          break;
        }
      }

      /* End of SwitchCase: '<S6>/Switch Case' */
    }

    /* Sum: '<S6>/Sum4' incorporates:
     *  DataTypeConversion: '<Root>/Data Type Conversion5'
     */
    Sum5 = control_B.Merge1 - (real32_T)control_Y.buck_out_vol;
    if (rtmIsMajorTimeStep(control_M)) {
      /* Gain: '<S98>/Filter Coefficient' incorporates:
       *  DiscreteIntegrator: '<S90>/Filter'
       *  Gain: '<S88>/Derivative Gain'
       *  Sum: '<S90>/SumD'
       */
      rtb_FilterCoefficient = (voltage_d * Sum5 - control_DW.Filter_DSTATE) *
        control_P.VoltagePID_N;

      /* Saturate: '<S6>/Saturation' incorporates:
       *  Constant: '<S6>/Constant2'
       *  DiscreteIntegrator: '<S95>/Integrator'
       *  Gain: '<S100>/Proportional Gain'
       *  Sum: '<S104>/Sum'
       *  Sum: '<S6>/Sum7'
       */
      control_B.Saturation = ((voltage_p * Sum5 + control_DW.Integrator_DSTATE)
        + rtb_FilterCoefficient) + control_P.Constant2_Value;

      /* Saturate: '<S6>/Saturation' */
      if (control_B.Saturation > control_P.Saturation_UpperSat) {
        /* Saturate: '<S6>/Saturation' */
        control_B.Saturation = control_P.Saturation_UpperSat;
      } else if (control_B.Saturation < control_P.Saturation_LowerSat) {
        /* Saturate: '<S6>/Saturation' */
        control_B.Saturation = control_P.Saturation_LowerSat;
      }

      /* End of Saturate: '<S6>/Saturation' */

      /* Gain: '<S92>/Integral Gain' */
      rtb_IntegralGain = voltage_i * Sum5;
    }
  }

  /* End of Outputs for SubSystem: '<S3>/Voltage' */
  if (rtmIsMajorTimeStep(control_M)) {
    /* DataTypeConversion: '<Root>/Data Type Conversion' */
    tmp = floor(control_B.Saturation);
    if (rtIsNaN(tmp) || rtIsInf(tmp)) {
      tmp = 0.0;
    } else {
      tmp = fmod(tmp, 65536.0);
    }

    control_Y.out.power = (uint16_T)(tmp < 0.0 ? (int32_T)(uint16_T)-(int16_T)
      (uint16_T)-tmp : (int32_T)(uint16_T)tmp);

    /* End of DataTypeConversion: '<Root>/Data Type Conversion' */

    /* DataTypeConversion: '<Root>/Data Type Conversion2' */
    tmp = floor(control_B.cmd_buck_in_relay);
    if (rtIsNaN(tmp) || rtIsInf(tmp)) {
      tmp = 0.0;
    } else {
      tmp = fmod(tmp, 65536.0);
    }

    control_Y.out.relay_in = (uint16_T)(tmp < 0.0 ? (int32_T)(uint16_T)-(int16_T)
      (uint16_T)-tmp : (int32_T)(uint16_T)tmp);

    /* End of DataTypeConversion: '<Root>/Data Type Conversion2' */

    /* DataTypeConversion: '<Root>/Data Type Conversion3' */
    tmp = floor(control_B.cmd_buck_out_relay);
    if (rtIsNaN(tmp) || rtIsInf(tmp)) {
      tmp = 0.0;
    } else {
      tmp = fmod(tmp, 65536.0);
    }

    control_Y.out.relay_out = (uint16_T)(tmp < 0.0 ? (int32_T)(uint16_T)
      -(int16_T)(uint16_T)-tmp : (int32_T)(uint16_T)tmp);

    /* End of DataTypeConversion: '<Root>/Data Type Conversion3' */

    /* BusCreator generated from: '<Root>/out' incorporates:
     *  Outport generated from: '<Root>/out'
     */
    control_Y.out.fan = rtb_fan;
  }

  /* Lookup_n-D: '<Root>/1-D Lookup Table' incorporates:
   *  Inport generated from: '<Root>/In Bus Element'
   */
  control_B.uDLookupTable = look1_binlxpw(control_U.sens_pwr_voltage,
    control_P.uDLookupTable_bp01Data, control_P.uDLookupTable_tableData, 150U);

  /* Lookup_n-D: '<Root>/1-D Lookup Table1' incorporates:
   *  Inport generated from: '<Root>/In Bus Element1'
   */
  control_B.uDLookupTable1 = look1_binlxpw(control_U.sens_bat_voltage,
    control_P.uDLookupTable1_bp01Data, control_P.uDLookupTable1_tableData, 150U);

  /* Lookup_n-D: '<Root>/1-D Lookup Table2' incorporates:
   *  Inport generated from: '<Root>/In Bus Element2'
   */
  control_B.uDLookupTable2 = look1_binlxpw(control_U.sens_buck_in_voltage,
    control_P.uDLookupTable2_bp01Data, control_P.uDLookupTable2_tableData, 150U);

  /* Lookup_n-D: '<Root>/1-D Lookup Table3' incorporates:
   *  Inport generated from: '<Root>/In Bus Element3'
   */
  control_B.uDLookupTable3 = look1_binlxpw(control_U.sens_buck_out_voltage,
    control_P.uDLookupTable3_bp01Data, control_P.uDLookupTable3_tableData, 150U);

  /* Lookup_n-D: '<Root>/1-D Lookup Table4' incorporates:
   *  Inport generated from: '<Root>/In Bus Element4'
   */
  control_B.uDLookupTable4 = look1_binlxpw(control_U.sens_bat_current,
    control_P.uDLookupTable4_bp01Data, control_P.uDLookupTable4_tableData, 60U);
  if (rtmIsMajorTimeStep(control_M)) {
    /* Update for Enabled SubSystem: '<S3>/Current ' incorporates:
     *  EnablePort: '<S5>/Enable'
     */
    if (control_DW.Current_MODE && rtmIsMajorTimeStep(control_M)) {
      /* Update for DiscreteIntegrator: '<S36>/Filter' */
      control_DW.Filter_DSTATE_i += control_P.Filter_gainval *
        rtb_FilterCoefficient_o;

      /* Update for DiscreteIntegrator: '<S41>/Integrator' */
      control_DW.Integrator_DSTATE_f += control_P.Integrator_gainval *
        rtb_IntegralGain_l;
    }

    /* End of Update for SubSystem: '<S3>/Current ' */

    /* Update for Enabled SubSystem: '<S3>/Voltage' incorporates:
     *  EnablePort: '<S6>/Enable'
     */
    if (control_DW.Voltage_MODE && rtmIsMajorTimeStep(control_M)) {
      /* Update for DiscreteIntegrator: '<S95>/Integrator' */
      control_DW.Integrator_DSTATE += control_P.Integrator_gainval_b *
        rtb_IntegralGain;

      /* Update for DiscreteIntegrator: '<S90>/Filter' */
      control_DW.Filter_DSTATE += control_P.Filter_gainval_h *
        rtb_FilterCoefficient;
    }

    /* End of Update for SubSystem: '<S3>/Voltage' */
  }                                    /* end MajorTimeStep */

  if (rtmIsMajorTimeStep(control_M)) {
    rt_ertODEUpdateContinuousStates(&control_M->solverInfo);

    /* Update absolute time for base rate */
    /* The "clockTick0" counts the number of times the code of this task has
     * been executed. The absolute time is the multiplication of "clockTick0"
     * and "Timing.stepSize0". Size of "clockTick0" ensures timer will not
     * overflow during the application lifespan selected.
     */
    ++control_M->Timing.clockTick0;
    control_M->Timing.t[0] = rtsiGetSolverStopTime(&control_M->solverInfo);

    {
      /* Update absolute timer for sample time: [0.005s, 0.0s] */
      /* The "clockTick1" counts the number of times the code of this task has
       * been executed. The resolution of this integer timer is 0.005, which is the step size
       * of the task. Size of "clockTick1" ensures timer will not overflow during the
       * application lifespan selected.
       */
      control_M->Timing.clockTick1++;
    }
  }                                    /* end MajorTimeStep */
}

/* Derivatives for root system: '<Root>' */
void control_derivatives(void)
{
  XDot_control_T *_rtXdot;
  uint32_T ri;
  _rtXdot = ((XDot_control_T *) control_M->derivs);

  /* Derivatives for StateSpace: '<Root>/Analog Filter Design' */
  _rtXdot->AnalogFilterDesign_CSTATE[0] = 0.0;
  _rtXdot->AnalogFilterDesign_CSTATE[1] = 0.0;
  for (ri = control_P.AnalogFilterDesign_A_jc[0U]; ri <
       control_P.AnalogFilterDesign_A_jc[1U]; ri++) {
    _rtXdot->AnalogFilterDesign_CSTATE[control_P.AnalogFilterDesign_A_ir[ri]] +=
      control_P.AnalogFilterDesign_A_pr[ri] *
      control_X.AnalogFilterDesign_CSTATE[0U];
  }

  for (ri = control_P.AnalogFilterDesign_A_jc[1U]; ri <
       control_P.AnalogFilterDesign_A_jc[2U]; ri++) {
    _rtXdot->AnalogFilterDesign_CSTATE[control_P.AnalogFilterDesign_A_ir[ri]] +=
      control_P.AnalogFilterDesign_A_pr[ri] *
      control_X.AnalogFilterDesign_CSTATE[1U];
  }

  for (ri = control_P.AnalogFilterDesign_B_jc[0U]; ri <
       control_P.AnalogFilterDesign_B_jc[1U]; ri++) {
    _rtXdot->AnalogFilterDesign_CSTATE[control_P.AnalogFilterDesign_B_ir] +=
      control_P.AnalogFilterDesign_B_pr * control_B.uDLookupTable;
  }

  /* End of Derivatives for StateSpace: '<Root>/Analog Filter Design' */

  /* Derivatives for StateSpace: '<Root>/Analog Filter Design1' */
  _rtXdot->AnalogFilterDesign1_CSTATE[0] = 0.0;
  _rtXdot->AnalogFilterDesign1_CSTATE[1] = 0.0;
  for (ri = control_P.AnalogFilterDesign1_A_jc[0U]; ri <
       control_P.AnalogFilterDesign1_A_jc[1U]; ri++) {
    _rtXdot->AnalogFilterDesign1_CSTATE[control_P.AnalogFilterDesign1_A_ir[ri]] +=
      control_P.AnalogFilterDesign1_A_pr[ri] *
      control_X.AnalogFilterDesign1_CSTATE[0U];
  }

  for (ri = control_P.AnalogFilterDesign1_A_jc[1U]; ri <
       control_P.AnalogFilterDesign1_A_jc[2U]; ri++) {
    _rtXdot->AnalogFilterDesign1_CSTATE[control_P.AnalogFilterDesign1_A_ir[ri]] +=
      control_P.AnalogFilterDesign1_A_pr[ri] *
      control_X.AnalogFilterDesign1_CSTATE[1U];
  }

  for (ri = control_P.AnalogFilterDesign1_B_jc[0U]; ri <
       control_P.AnalogFilterDesign1_B_jc[1U]; ri++) {
    _rtXdot->AnalogFilterDesign1_CSTATE[control_P.AnalogFilterDesign1_B_ir] +=
      control_P.AnalogFilterDesign1_B_pr * control_B.uDLookupTable1;
  }

  /* End of Derivatives for StateSpace: '<Root>/Analog Filter Design1' */

  /* Derivatives for StateSpace: '<Root>/Analog Filter Design2' */
  _rtXdot->AnalogFilterDesign2_CSTATE[0] = 0.0;
  _rtXdot->AnalogFilterDesign2_CSTATE[1] = 0.0;
  for (ri = control_P.AnalogFilterDesign2_A_jc[0U]; ri <
       control_P.AnalogFilterDesign2_A_jc[1U]; ri++) {
    _rtXdot->AnalogFilterDesign2_CSTATE[control_P.AnalogFilterDesign2_A_ir[ri]] +=
      control_P.AnalogFilterDesign2_A_pr[ri] *
      control_X.AnalogFilterDesign2_CSTATE[0U];
  }

  for (ri = control_P.AnalogFilterDesign2_A_jc[1U]; ri <
       control_P.AnalogFilterDesign2_A_jc[2U]; ri++) {
    _rtXdot->AnalogFilterDesign2_CSTATE[control_P.AnalogFilterDesign2_A_ir[ri]] +=
      control_P.AnalogFilterDesign2_A_pr[ri] *
      control_X.AnalogFilterDesign2_CSTATE[1U];
  }

  for (ri = control_P.AnalogFilterDesign2_B_jc[0U]; ri <
       control_P.AnalogFilterDesign2_B_jc[1U]; ri++) {
    _rtXdot->AnalogFilterDesign2_CSTATE[control_P.AnalogFilterDesign2_B_ir] +=
      control_P.AnalogFilterDesign2_B_pr * control_B.uDLookupTable2;
  }

  /* End of Derivatives for StateSpace: '<Root>/Analog Filter Design2' */

  /* Derivatives for StateSpace: '<Root>/Analog Filter Design3' */
  _rtXdot->AnalogFilterDesign3_CSTATE[0] = 0.0;
  _rtXdot->AnalogFilterDesign3_CSTATE[1] = 0.0;
  for (ri = control_P.AnalogFilterDesign3_A_jc[0U]; ri <
       control_P.AnalogFilterDesign3_A_jc[1U]; ri++) {
    _rtXdot->AnalogFilterDesign3_CSTATE[control_P.AnalogFilterDesign3_A_ir[ri]] +=
      control_P.AnalogFilterDesign3_A_pr[ri] *
      control_X.AnalogFilterDesign3_CSTATE[0U];
  }

  for (ri = control_P.AnalogFilterDesign3_A_jc[1U]; ri <
       control_P.AnalogFilterDesign3_A_jc[2U]; ri++) {
    _rtXdot->AnalogFilterDesign3_CSTATE[control_P.AnalogFilterDesign3_A_ir[ri]] +=
      control_P.AnalogFilterDesign3_A_pr[ri] *
      control_X.AnalogFilterDesign3_CSTATE[1U];
  }

  for (ri = control_P.AnalogFilterDesign3_B_jc[0U]; ri <
       control_P.AnalogFilterDesign3_B_jc[1U]; ri++) {
    _rtXdot->AnalogFilterDesign3_CSTATE[control_P.AnalogFilterDesign3_B_ir] +=
      control_P.AnalogFilterDesign3_B_pr * control_B.uDLookupTable3;
  }

  /* End of Derivatives for StateSpace: '<Root>/Analog Filter Design3' */

  /* Derivatives for StateSpace: '<Root>/Analog Filter Design4' */
  _rtXdot->AnalogFilterDesign4_CSTATE[0] = 0.0;
  _rtXdot->AnalogFilterDesign4_CSTATE[1] = 0.0;
  for (ri = control_P.AnalogFilterDesign4_A_jc[0U]; ri <
       control_P.AnalogFilterDesign4_A_jc[1U]; ri++) {
    _rtXdot->AnalogFilterDesign4_CSTATE[control_P.AnalogFilterDesign4_A_ir[ri]] +=
      control_P.AnalogFilterDesign4_A_pr[ri] *
      control_X.AnalogFilterDesign4_CSTATE[0U];
  }

  for (ri = control_P.AnalogFilterDesign4_A_jc[1U]; ri <
       control_P.AnalogFilterDesign4_A_jc[2U]; ri++) {
    _rtXdot->AnalogFilterDesign4_CSTATE[control_P.AnalogFilterDesign4_A_ir[ri]] +=
      control_P.AnalogFilterDesign4_A_pr[ri] *
      control_X.AnalogFilterDesign4_CSTATE[1U];
  }

  for (ri = control_P.AnalogFilterDesign4_B_jc[0U]; ri <
       control_P.AnalogFilterDesign4_B_jc[1U]; ri++) {
    _rtXdot->AnalogFilterDesign4_CSTATE[control_P.AnalogFilterDesign4_B_ir] +=
      control_P.AnalogFilterDesign4_B_pr * control_B.uDLookupTable4;
  }

  /* End of Derivatives for StateSpace: '<Root>/Analog Filter Design4' */
}

/* Model initialize function */
void control_initialize(void)
{
  /* Registration code */
  {
    /* Setup solver object */
    rtsiSetSimTimeStepPtr(&control_M->solverInfo, &control_M->Timing.simTimeStep);
    rtsiSetTPtr(&control_M->solverInfo, &rtmGetTPtr(control_M));
    rtsiSetStepSizePtr(&control_M->solverInfo, &control_M->Timing.stepSize0);
    rtsiSetdXPtr(&control_M->solverInfo, &control_M->derivs);
    rtsiSetContStatesPtr(&control_M->solverInfo, (real_T **)
                         &control_M->contStates);
    rtsiSetNumContStatesPtr(&control_M->solverInfo,
      &control_M->Sizes.numContStates);
    rtsiSetNumPeriodicContStatesPtr(&control_M->solverInfo,
      &control_M->Sizes.numPeriodicContStates);
    rtsiSetPeriodicContStateIndicesPtr(&control_M->solverInfo,
      &control_M->periodicContStateIndices);
    rtsiSetPeriodicContStateRangesPtr(&control_M->solverInfo,
      &control_M->periodicContStateRanges);
    rtsiSetContStateDisabledPtr(&control_M->solverInfo, (boolean_T**)
      &control_M->contStateDisabled);
    rtsiSetErrorStatusPtr(&control_M->solverInfo, (&rtmGetErrorStatus(control_M)));
    rtsiSetRTModelPtr(&control_M->solverInfo, control_M);
  }

  rtsiSetSimTimeStep(&control_M->solverInfo, MAJOR_TIME_STEP);
  rtsiSetIsMinorTimeStepWithModeChange(&control_M->solverInfo, false);
  rtsiSetIsContModeFrozen(&control_M->solverInfo, false);
  control_M->intgData.y = control_M->odeY;
  control_M->intgData.f[0] = control_M->odeF[0];
  control_M->intgData.f[1] = control_M->odeF[1];
  control_M->intgData.f[2] = control_M->odeF[2];
  control_M->intgData.f[3] = control_M->odeF[3];
  control_M->contStates = ((X_control_T *) &control_X);
  control_M->contStateDisabled = ((XDis_control_T *) &control_XDis);
  control_M->Timing.tStart = (0.0);
  rtsiSetSolverData(&control_M->solverInfo, (void *)&control_M->intgData);
  rtsiSetSolverName(&control_M->solverInfo,"ode4");
  rtmSetTPtr(control_M, &control_M->Timing.tArray[0]);
  control_M->Timing.stepSize0 = 0.005;

  /* Initialize DataMapInfo substructure containing ModelMap for C API */
  control_InitializeDataMapInfo();

  /* InitializeConditions for StateSpace: '<Root>/Analog Filter Design' */
  control_X.AnalogFilterDesign_CSTATE[0] =
    control_P.AnalogFilterDesign_InitialCondi;

  /* InitializeConditions for StateSpace: '<Root>/Analog Filter Design1' */
  control_X.AnalogFilterDesign1_CSTATE[0] =
    control_P.AnalogFilterDesign1_InitialCond;

  /* InitializeConditions for StateSpace: '<Root>/Analog Filter Design2' */
  control_X.AnalogFilterDesign2_CSTATE[0] =
    control_P.AnalogFilterDesign2_InitialCond;

  /* InitializeConditions for StateSpace: '<Root>/Analog Filter Design3' */
  control_X.AnalogFilterDesign3_CSTATE[0] =
    control_P.AnalogFilterDesign3_InitialCond;

  /* InitializeConditions for StateSpace: '<Root>/Analog Filter Design4' */
  control_X.AnalogFilterDesign4_CSTATE[0] =
    control_P.AnalogFilterDesign4_InitialCond;

  /* InitializeConditions for StateSpace: '<Root>/Analog Filter Design' */
  control_X.AnalogFilterDesign_CSTATE[1] =
    control_P.AnalogFilterDesign_InitialCondi;

  /* InitializeConditions for StateSpace: '<Root>/Analog Filter Design1' */
  control_X.AnalogFilterDesign1_CSTATE[1] =
    control_P.AnalogFilterDesign1_InitialCond;

  /* InitializeConditions for StateSpace: '<Root>/Analog Filter Design2' */
  control_X.AnalogFilterDesign2_CSTATE[1] =
    control_P.AnalogFilterDesign2_InitialCond;

  /* InitializeConditions for StateSpace: '<Root>/Analog Filter Design3' */
  control_X.AnalogFilterDesign3_CSTATE[1] =
    control_P.AnalogFilterDesign3_InitialCond;

  /* InitializeConditions for StateSpace: '<Root>/Analog Filter Design4' */
  control_X.AnalogFilterDesign4_CSTATE[1] =
    control_P.AnalogFilterDesign4_InitialCond;

  /* SystemInitialize for Enabled SubSystem: '<S3>/Current ' */
  /* InitializeConditions for DiscreteIntegrator: '<S36>/Filter' */
  control_DW.Filter_DSTATE_i = control_P.CurrentPID_InitialConditionForF;

  /* InitializeConditions for DiscreteIntegrator: '<S41>/Integrator' */
  control_DW.Integrator_DSTATE_f = control_P.CurrentPID_InitialConditionForI;

  /* SystemInitialize for Sum: '<S50>/Sum' incorporates:
   *  Outport: '<S5>/current_out'
   */
  control_B.Sum = control_P.current_out_Y0;

  /* End of SystemInitialize for SubSystem: '<S3>/Current ' */

  /* SystemInitialize for Enabled SubSystem: '<S3>/Voltage' */
  /* InitializeConditions for DiscreteIntegrator: '<S95>/Integrator' */
  control_DW.Integrator_DSTATE = control_P.VoltagePID_InitialConditionForI;

  /* InitializeConditions for DiscreteIntegrator: '<S90>/Filter' */
  control_DW.Filter_DSTATE = control_P.VoltagePID_InitialConditionForF;

  /* SystemInitialize for Merge: '<S6>/Merge1' */
  control_B.Merge1 = control_P.Merge1_InitialOutput;

  /* SystemInitialize for Saturate: '<S6>/Saturation' incorporates:
   *  Outport: '<S6>/Voltage out'
   */
  control_B.Saturation = control_P.Voltageout_Y0;

  /* End of SystemInitialize for SubSystem: '<S3>/Voltage' */
}

/* Model terminate function */
void control_terminate(void)
{
  /* (no terminate code required) */
}

/*
 * File trailer for generated code.
 *
 * [EOF]
 */