diff --git a/B_Current_Ctrl.ioc b/B_Current_Ctrl.ioc
index 092b8b0..1de8414 100644
--- a/B_Current_Ctrl.ioc
+++ b/B_Current_Ctrl.ioc
@@ -73,7 +73,43 @@ Dma.Request4=USART2_RX
 Dma.Request5=USART2_TX
 Dma.Request6=USART3_RX
 Dma.Request7=USART3_TX
-Dma.RequestsNb=8
+Dma.Request8=UART5_RX
+Dma.Request9=UART5_TX
+Dma.RequestsNb=10
+Dma.UART5_RX.8.Direction=DMA_PERIPH_TO_MEMORY
+Dma.UART5_RX.8.EventEnable=DISABLE
+Dma.UART5_RX.8.Instance=DMA2_Channel1
+Dma.UART5_RX.8.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.UART5_RX.8.MemInc=DMA_MINC_ENABLE
+Dma.UART5_RX.8.Mode=DMA_CIRCULAR
+Dma.UART5_RX.8.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.UART5_RX.8.PeriphInc=DMA_PINC_DISABLE
+Dma.UART5_RX.8.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.UART5_RX.8.Priority=DMA_PRIORITY_LOW
+Dma.UART5_RX.8.RequestNumber=1
+Dma.UART5_RX.8.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.UART5_RX.8.SignalID=NONE
+Dma.UART5_RX.8.SyncEnable=DISABLE
+Dma.UART5_RX.8.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.UART5_RX.8.SyncRequestNumber=1
+Dma.UART5_RX.8.SyncSignalID=NONE
+Dma.UART5_TX.9.Direction=DMA_MEMORY_TO_PERIPH
+Dma.UART5_TX.9.EventEnable=DISABLE
+Dma.UART5_TX.9.Instance=DMA2_Channel2
+Dma.UART5_TX.9.MemDataAlignment=DMA_MDATAALIGN_BYTE
+Dma.UART5_TX.9.MemInc=DMA_MINC_ENABLE
+Dma.UART5_TX.9.Mode=DMA_NORMAL
+Dma.UART5_TX.9.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
+Dma.UART5_TX.9.PeriphInc=DMA_PINC_DISABLE
+Dma.UART5_TX.9.Polarity=HAL_DMAMUX_REQ_GEN_RISING
+Dma.UART5_TX.9.Priority=DMA_PRIORITY_LOW
+Dma.UART5_TX.9.RequestNumber=1
+Dma.UART5_TX.9.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,SignalID,Polarity,RequestNumber,SyncSignalID,SyncPolarity,SyncEnable,EventEnable,SyncRequestNumber
+Dma.UART5_TX.9.SignalID=NONE
+Dma.UART5_TX.9.SyncEnable=DISABLE
+Dma.UART5_TX.9.SyncPolarity=HAL_DMAMUX_SYNC_NO_EVENT
+Dma.UART5_TX.9.SyncRequestNumber=1
+Dma.UART5_TX.9.SyncSignalID=NONE
 Dma.USART1_RX.2.Direction=DMA_PERIPH_TO_MEMORY
 Dma.USART1_RX.2.EventEnable=DISABLE
 Dma.USART1_RX.2.Instance=DMA1_Channel3
@@ -278,6 +314,8 @@ NVIC.DMA1_Channel5_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DMA1_Channel6_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DMA1_Channel7_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DMA1_Channel8_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA2_Channel1_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
+NVIC.DMA2_Channel2_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false
 NVIC.ForceEnableDMAVector=true
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false\:false